SHF: Small: Semi-supervised Learning for Design and Quality Assurance of Integrated Circuits

SHF：小型：集成电路设计和质量保证的半监督学习

• 批准号: 2334380
• 负责人: Peng Li
• 金额: $ 60万
• 依托单位: University of California-Santa Barbara
• 依托单位国家: 美国
• 项目类别: Standard Grant
• 财政年份: 2024
• 资助国家: 美国
• 起止时间: 2024-10-01 至 2027-09-30
• 项目状态: 未结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=2334380&HistoricalAwards=false
• 关键词: SHF; Small; Semi; supervised; Learning

Integrated circuits (ICs) have found their way to a plethora of applications such as computing, communication and data processing, instrumentation, control, and transportation. The continuing technology scaling over the past decades has provided plentiful miniaturized devices with unprecedented performance and efficiency at the disposal of the designer. However, implementing ICs using modern technologies is not an easy task. The ever-increasing performance and robustness requirements and technology sophistications have rendered design, verification, and manufacturing complex and costly. This has tremendous impact on two fronts: design productivity and quality assurance, which are the targets of this project. First, there is a pressing need to close the widening design productivity gap due to the increasing circuit and system complexities, and shortage of experienced human designers, specifically for knowledge-intensive custom circuit design. Second, it is desirable to provide quality assurance in lieu of a combination of growing process instabilities and variations and demanding robustness requirements for mission critical applications such as automotive electronics, avionics, and biomedicine. This project will develop innovative machine learning technology to close the productivity gap and address the challenge in quality design in today’s ever-complex IC design and manufacturing setting. The algorithms, circuit models, and design tools resulted from this work will be disseminated in broad communities through publications, workshops, talks, and research collaborations. The lead investigator will actively recruit undergraduate students, including students from underrepresented groups, for research participation and training while partnering with various outreach programs. The project will produce excellent materials to be integrated into undergraduate and graduate level curriculum on integrated circuits and computer aided design powered by modern machine learning technology, thereby providing excellent workforce training opportunities in these areas of importance. Engagement with the US high-tech industry and other research organizations will be sought to broaden the impact of this work, and promote potential technology transfer to the practice.The technical approach of this work centers on semi-supervised learning, which allows for simultaneous use of labeled and unlabeled data for the targeted machine learning applications. While showing promise, semi-surprised learning has yet to be systemically explored in the integrated circuits community. To this end, this work will develop a semi-supervised learning framework to address the key challenge brought by lack of expensive labeled data and domain-specific needs of IC design and quality assurance, broadly applicable to data-efficient circuit optimization, failure and anomaly detection, test, and manufacturing data analysis. The focused domain-specific semi-supervised learning is promising in offering a potentially game-changing solution to the intended circuit applications by leveraging large amounts of cheap unlabeled data and reducing the utilization of expensive labeled data to its minimum. Specifically, this work will provide solutions to data-efficient design optimization and quality assurance under two settings: static and adaptive semi-supervised learning. In the former setting, learning is performed over a provided labeled dataset without additional labeled data query. The latter setting opens up the added dimension of adaptive semi-supervised learning with improved quality of learning and further reduced labeled data use.This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.

集成电路（ic）已经在计算、通信和数据处理、仪器仪表、控制和运输等众多应用中找到了自己的出路。在过去的几十年里，持续的技术规模已经为设计师提供了大量具有前所未有的性能和效率的小型化设备。然而，使用现代技术实现集成电路并不是一件容易的事。不断增长的性能和健壮性需求以及技术的复杂性使得设计、验证和制造变得复杂和昂贵。这对两个方面产生了巨大的影响：设计生产力和质量保证，这是这个项目的目标。首先，由于电路和系统复杂性的增加，以及经验丰富的人类设计师的短缺，特别是知识密集型定制电路设计，迫切需要缩小日益扩大的设计生产力差距。其次，提供质量保证是可取的，以代替不断增长的过程不稳定性和变化的组合，以及对任务关键应用（如汽车电子、航空电子和生物医学）的要求健壮性要求。该项目将开发创新的机器学习技术，以缩小生产力差距，并解决当今日益复杂的IC设计和制造环境中质量设计的挑战。算法、电路模型和设计工具将通过出版物、研讨会、讲座和研究合作在广泛的社区中传播。首席研究员将积极招募本科生，包括来自代表性不足群体的学生，参与研究和培训，同时与各种外展项目合作。该项目将提供优秀的材料，整合到集成电路和计算机辅助设计的本科和研究生课程中，以现代机器学习技术为动力，从而在这些重要领域提供优秀的劳动力培训机会。将寻求与美国高科技产业和其他研究组织的合作，以扩大这项工作的影响，并促进潜在的技术转让。这项工作的技术方法以半监督学习为中心，它允许为目标机器学习应用程序同时使用标记和未标记的数据。虽然显示出希望，但半惊喜学习尚未在集成电路社区进行系统探索。为此，本工作将开发一种半监督学习框架，以解决由于缺乏昂贵的标记数据以及IC设计和质量保证的特定领域需求所带来的关键挑战，广泛适用于数据高效电路优化，故障和异常检测，测试和制造数据分析。专注于特定领域的半监督学习有望通过利用大量廉价的未标记数据并将昂贵的标记数据的利用率降至最低，为预期的电路应用提供潜在的改变游戏规则的解决方案。具体而言，本工作将在静态和自适应半监督学习两种设置下为数据高效设计优化和质量保证提供解决方案。在前一种设置中，学习是在提供的标记数据集上执行的，而不需要额外的标记数据查询。后一种设置开辟了自适应半监督学习的额外维度，提高了学习质量，并进一步减少了标记数据的使用。该奖项反映了美国国家科学基金会的法定使命，并通过使用基金会的知识价值和更广泛的影响审查标准进行评估，被认为值得支持。