Scalable Nanofabrication of Two-Dimensional Semiconductor Heterojunction Devices

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Semiconductor heterostructures with tailored electronic and optoelectronic properties are a key in fabricating new generation of electronic devices for applications in high-frequency electronics, sensors, detectors, terahertz sources, low power tunnel field effect transistors, and computing memories. Despite some progress being made at different research levels, a versatile strategy to fabricate semiconductor heterostructures with well-defined nanoscale junctions on a large wafer-scale is still lacking, impeding their widespread commercial applications. Recently discovered two-dimensional transition metal dichalcogenide semiconductors are promising in this respect owing to their intrinsically small sizes and layered structures coupled with facile material growth. This award investigates the scalable and cost-effective nanofabrication of various semiconductor heterojunction devices by rationally integrating multiple two-dimensional materials of dissimilar components and functionalities with near atom thickness. Accordingly, the award advances nano-electronics industries and communities by delivering a new form of semiconductors and manufacturing strategies, expediting the development of high-performance information storage and logic devices that operate at higher speed and dissipate less energy than current technologies. The award also offers multidisciplinary training opportunities for graduate and undergraduate students including minority and underrepresented groups in physics, chemistry, materials science, electrical engineering, and nanotechnology. The outcomes from the award are implemented for curriculum development. Educational modules are developed for outreach to local mid and high schools and communities. This research project explores viable stratgies to fabricate heterogenously-integrated multiple two-dimensional semiconducting transition metal dichalcogenides with desired dimensions, geometries, compositions and tailored band-offset, all essential for high-quality nanoscale heterojunctions. Morphology controlled two-dimensional materials are grown by various deposition processes including chemical vapor deposition, low temperature physical vapor deposition, and atomic layer deposition, which ensures uniform electrical properties, wafer-level scalability and atomic-level control in the nanoscale heterojunctions. The effect of material growth parameters on nanoscale structural variations are evaluated by in-situ/ex-situ transmission electron microscopy and electron transport measurements. Once the optimized growth conditions and the underlying structure-property relationships are established, a variety of heterojunction electronic devices are fabricated by growing one layer of the two-dimensional material on top of the other, which includes p-n junction, double heterojunction, and superlattices. The device fabrication employs a series of metal depositions for contacts and chemical or atomic layer depositions, accompanied by a scalalabe optical lithography process. Carrier transport and the electrical performances of the heterojunction devices are evaluated and are corroborated with the structural characterizations by transmission electron microscopy.