Direct Writing of Nanodevices: A Sustainable Route to Nanofabrication

纳米器件的直接写入：纳米制造的可持续之路

• 批准号: EP/X016404/1
• 负责人: David Lewis
• 金额: $ 179.15万
• 依托单位: University of Manchester
• 依托单位国家: 英国
• 项目类别: Research Grant
• 财政年份: 2023
• 资助国家: 英国
• 起止时间: 2023 至 无数据
• 项目状态: 未结题
• 来源: https://gtr.ukri.org/projects?ref=EP%2FX016404%2F1
• 关键词: Direct; Writing; Nanodevices; Sustainable; Route

The ability to write structures at the nanoscale using lithography underpins modern society. The electronic devices we take for granted contain integrated circuits (ICs), and the key component of those circuits are field-effect transistors (FETs). They have reduced in size by a factor of two every two years for over forty years, following "Moore's Law". The roadmap for the electronics industry now assumes that this constant reduction of size will continue - at least until the mid-2020s. At the end of 2019, Extreme ultraviolet lithography (EUVL) began to be used to manufacture FinFETs (i.e. FETs that resemble a Fin) as part of ICs at the 7 nm node. Unfortunately, EUVL has an astronomical cost, where each tool costs > $100 M dollars with similarly costs for maintenance. It is evident that this is a colossal investment for larger' semiconductor manufacturers i.e. Intel, TSMC, Samsung, Global Foundries, Infineon, LG. The cost is not sustainable which has led the International Technology Roadmap for Semiconductors (ITRS) to declare that it will no longer be economically feasible to decrease FET device dimensions past the 5 nm node. This has led to significant uncertainty in the future direction of the semiconductor industry, especially for smaller manufacturers that risk being priced out of the market. Additionally, lithography is a subtractive process and very energy demanding. Layers are added in manufacture that are then largely etched away during fabrication. This is wasteful and more sustainable processes are needed moving forward. Equally, plasma etching for the step where the lithographed structure is transferred into the substrate (silicon or compound semiconductor) uses a large amount of energy. If we could directly write structures we would use less precursor, produce less waste and reduce energy consumption and potentially make the process sustainable as well as accessible for smaller manufacturers. In this proposal, we will demonstrate a new sustainable and relatively inexpensive manufacturing process that will allow less waste and reduce energy consumption and potentially make the process sustainable as well as accessible for smaller manufacturers in the UK and beyond. This new manufacturing technique is based on the decomposition of molecular precursor molecules in ion beams. As these precursors have preformed metal-chalcogen bonds they decompose in the ion beam directly to useful semiconductors such as metal oxides and metal sulfides, with written pattern resolutions beyond the 7 nm node, at a fraction of the time and processing cost compared to extant processes in the semiconductor industry. We will demonstrate that a number of useful nanoscale devices for (i) thermoelectric energy generation (ii) single photon detection above 77K and (iii) logic circuits for 16 bit memory can be prepared in this way, written at resolutions beyond what is currently possible to most small semiconductor businesses in the UK. This work is nationally important and extremely timely; approximately 13 sextillion (10e22) transistors have been made by lithography. For example, there are 8.5 billion FETs in a new smartphone and around 3.5 billion smartphones on the planet. For the UK to compete in the next generation of devices at the 7 nm node we need innovative and sustainable approaches; we do not have companies large enough to invest in EUV writing tools (for example: we do not have an equivalent to Global Foundries, Samsung, TSMC, or Intel) to lead UK activity in this area, and to not address this deficiency in a key technological underpinning tool would mean the UK falling behind significantly in emerging technologies. By funding this proposal the UK can begin to address this deficit in its manufacturing capability.

利用光刻技术在纳米尺度上书写结构的能力是现代社会的基础。我们认为理所当然的电子设备包含集成电路（ic），而这些电路的关键组件是场效应晶体管（fet）。在过去的四十多年里，它们的体积每两年缩小两倍，遵循“摩尔定律”。目前，电子行业的路线图假设这种不断缩小的尺寸将持续下去——至少到本世纪20年代中期。在2019年底，极紫外光刻（EUVL）开始用于制造finfet（即类似于Fin的fet），作为7 nm节点ic的一部分。不幸的是，EUVL的成本是天文数字，每个工具的成本为1亿美元，维护成本也类似。很明显，对于较大的半导体制造商，如英特尔、台积电、三星、环球铸造厂、英飞凌、LG来说，这是一笔巨大的投资。成本是不可持续的，这导致国际半导体技术路线图（ITRS）宣布，将FET器件尺寸减小到5nm节点以上将不再具有经济可行性。这给半导体行业的未来发展方向带来了巨大的不确定性，尤其是对于那些有可能被挤出市场的小型制造商来说。此外，光刻是一个减法过程，非常需要能量。在制造过程中添加层，然后在制造过程中大部分被蚀刻掉。这是一种浪费，需要更可持续的进程向前发展。同样，在将光刻结构转移到衬底（硅或化合物半导体）的步骤中，等离子体蚀刻需要使用大量的能量。如果我们可以直接编写结构，我们将使用更少的前体，产生更少的废物，减少能源消耗，并有可能使过程可持续发展，并为小型制造商所接受。在这个提案中，我们将展示一种新的可持续和相对廉价的制造工艺，它将允许更少的浪费和减少能源消耗，并有可能使该工艺可持续，并为英国及其他地区的小型制造商所接受。这种新的制造技术是基于分子前体分子在离子束中的分解。由于这些前驱体已经形成了金属-硫键，它们在离子束中直接分解成有用的半导体，如金属氧化物和金属硫化物，具有超过7纳米节点的书面图案分辨率，与半导体工业现有工艺相比，时间和加工成本都很低。我们将展示许多有用的纳米级器件，用于(i)热电发电（ii） 77K以上的单光子探测和（iii） 16位存储器的逻辑电路，可以用这种方式制备，以超出目前英国大多数小型半导体企业可能的分辨率编写。这项工作具有全国性的重要性，而且非常及时；用光刻技术制造了大约13万亿（10e22）个晶体管。例如，一部新的智能手机中有85亿个场效应晶体管，而地球上大约有35亿个智能手机。对于英国来说，要在7纳米节点的下一代设备中竞争，我们需要创新和可持续的方法；我们没有足够大的公司来投资于EUV编写工具（例如：我们没有相当于Global Foundries，三星，台积电或英特尔）来领导英国在这一领域的活动，并且不解决关键技术基础工具的这一缺陷将意味着英国在新兴技术方面明显落后。通过资助这一提议，英国可以开始解决其制造能力的赤字问题。