Direct Writing of Nanodevices: A Sustainable Route to Nanofabrication

纳米器件的直接写入：纳米制造的可持续之路

• 批准号: EP/X016404/1
• 负责人: David Lewis
• 金额: $ 179.15万
• 依托单位: University of Manchester
• 依托单位国家: 英国
• 项目类别: Research Grant
• 财政年份: 2023
• 资助国家: 英国
• 起止时间: 2023 至 无数据
• 项目状态: 未结题
• 来源: https://gtr.ukri.org/projects?ref=EP%2FX016404%2F1
• 关键词: Direct; Writing; Nanodevices; Sustainable; Route

The ability to write structures at the nanoscale using lithography underpins modern society. The electronic devices we take for granted contain integrated circuits (ICs), and the key component of those circuits are field-effect transistors (FETs). They have reduced in size by a factor of two every two years for over forty years, following "Moore's Law". The roadmap for the electronics industry now assumes that this constant reduction of size will continue - at least until the mid-2020s. At the end of 2019, Extreme ultraviolet lithography (EUVL) began to be used to manufacture FinFETs (i.e. FETs that resemble a Fin) as part of ICs at the 7 nm node. Unfortunately, EUVL has an astronomical cost, where each tool costs > $100 M dollars with similarly costs for maintenance. It is evident that this is a colossal investment for larger' semiconductor manufacturers i.e. Intel, TSMC, Samsung, Global Foundries, Infineon, LG. The cost is not sustainable which has led the International Technology Roadmap for Semiconductors (ITRS) to declare that it will no longer be economically feasible to decrease FET device dimensions past the 5 nm node. This has led to significant uncertainty in the future direction of the semiconductor industry, especially for smaller manufacturers that risk being priced out of the market. Additionally, lithography is a subtractive process and very energy demanding. Layers are added in manufacture that are then largely etched away during fabrication. This is wasteful and more sustainable processes are needed moving forward. Equally, plasma etching for the step where the lithographed structure is transferred into the substrate (silicon or compound semiconductor) uses a large amount of energy. If we could directly write structures we would use less precursor, produce less waste and reduce energy consumption and potentially make the process sustainable as well as accessible for smaller manufacturers. In this proposal, we will demonstrate a new sustainable and relatively inexpensive manufacturing process that will allow less waste and reduce energy consumption and potentially make the process sustainable as well as accessible for smaller manufacturers in the UK and beyond. This new manufacturing technique is based on the decomposition of molecular precursor molecules in ion beams. As these precursors have preformed metal-chalcogen bonds they decompose in the ion beam directly to useful semiconductors such as metal oxides and metal sulfides, with written pattern resolutions beyond the 7 nm node, at a fraction of the time and processing cost compared to extant processes in the semiconductor industry. We will demonstrate that a number of useful nanoscale devices for (i) thermoelectric energy generation (ii) single photon detection above 77K and (iii) logic circuits for 16 bit memory can be prepared in this way, written at resolutions beyond what is currently possible to most small semiconductor businesses in the UK. This work is nationally important and extremely timely; approximately 13 sextillion (10e22) transistors have been made by lithography. For example, there are 8.5 billion FETs in a new smartphone and around 3.5 billion smartphones on the planet. For the UK to compete in the next generation of devices at the 7 nm node we need innovative and sustainable approaches; we do not have companies large enough to invest in EUV writing tools (for example: we do not have an equivalent to Global Foundries, Samsung, TSMC, or Intel) to lead UK activity in this area, and to not address this deficiency in a key technological underpinning tool would mean the UK falling behind significantly in emerging technologies. By funding this proposal the UK can begin to address this deficit in its manufacturing capability.

使用光刻在纳米尺度上写入结构的能力支撑着现代社会。我们认为理所当然的电子设备包含集成电路（IC），而这些电路的关键组件是场效应晶体管（FET）。四十多年来，遵循“摩尔定律”，它们的尺寸每两年缩小两倍。电子行业的路线图现在假设这种尺寸的不断缩小将持续下去——至少到 2020 年代中期。 2019 年底，极紫外光刻 (EUVL) 开始用于制造 FinFET（即类似于 Fin 的 FET），作为 7 nm 节点 IC 的一部分。不幸的是，EUVL 的成本是天文数字，每个工具的成本超过 1 亿美元，维护成本也类似。显然，这对于英特尔、台积电、三星、格罗方德、英飞凌、LG 等大型半导体制造商来说是一笔巨大的投资。由于成本不可持续，国际半导体技术路线图 (ITRS) 宣布将 FET 器件尺寸减小到 5 nm 节点以上将不再具有经济可行性。这导致半导体行业的未来方向存在巨大的不确定性，特别是对于面临被定价挤出市场风险的小型制造商而言。此外，光刻是一种减材工艺，对能量的要求很高。在制造过程中添加层，然后在制造过程中大部分被蚀刻掉。这是一种浪费，需要更可持续的流程来推进。同样，将光刻结构转移到衬底（硅或化合物半导体）的步骤中的等离子体蚀刻使用大量能量。如果我们可以直接编写结构，我们将使用更少的前体，产生更少的废物并减少能源消耗，并有可能使该过程可持续且可供小型制造商使用。在本提案中，我们将展示一种新的可持续且相对便宜的制造工艺，该工艺将减少浪费并减少能源消耗，并有可能使该工艺可持续且可供英国及其他地区的小型制造商使用。这种新的制造技术基于离子束中分子前体分子的分解。由于这些前驱体已预先形成金属-硫族键，因此它们在离子束中直接分解为有用的半导体，例如金属氧化物和金属硫化物，其写入图案分辨率超过 7 nm 节点，与半导体行业现有工艺相比，时间和处理成本仅为一小部分。我们将证明，可以通过这种方式制备许多有用的纳米级器件，用于 (i) 热电发电 (ii) 77K 以上的单光子检测和 (iii) 16 位存储器的逻辑电路，其写入分辨率超出了英国大多数小型半导体企业目前所能达到的分辨率。这项工作对于国家来说非常重要，而且非常及时；大约有 13 个 sextillion (10e22) 晶体管已通过光刻技术制成。例如，一部新智能手机中有 85 亿个 FET，全球智能手机约有 35 亿部。为了让英国在 7 纳米节点的下一代设备中竞争，我们需要创新和可持续的方法；我们没有足够大的公司来投资 EUV 写入工具（例如：我们没有与 Global Foundries、三星、台积电或英特尔相当的公司）来领导英国在这一领域的活动，如果不解决关键技术支撑工具的这一缺陷，将意味着英国在新兴技术方面严重落后。通过资助该提案，英国可以开始解决其制造能力的不足。