Topological Insulator Field Effect Transistors for Memory and Sensors

在过去的四十年里，互补金属氧化物半导体(CMOS)技术的无情、指数级的进步使得强大的硅芯片的设计和制造成为可能，这些芯片是改变当代社会的微电子革命的引擎：计算机、智能手机、物联网(IoT)、人工智能(AI)，不一而足，现代生活中没有任何方面是硅芯片没有触及过的。然而，随着小型化(根据摩尔定律)正在达到基本的物理限制，传统CMOS技术的进展已经显著放缓。为了使进展成为可能，世界各地的研究人员考虑使用新材料(例如拓扑绝缘体)的新方法，并发明新型晶体管和新型高速、高密度和低功耗的存储技术。因此，这项建议的研究目标是进一步利用我们对拓扑绝缘体纳米线和薄膜特性的了解，构建具有不同于传统CMOS技术的工作原理的新概念场效应晶体管，同时继续受益于半导体行业多年来在该技术(CMOS)方面积累的丰富经验。如果成功，这项拟议研究的结果还将包括由这些拓扑绝缘体晶体管实现的新的存储设备和传感器。研究生、本科生和高中生将有机会与工业和政府实验室的合作者互动。本研究的目标是设计和制作拓扑绝缘场效应晶体管平台，以发掘和开发栅控拓扑表面态在新概念非易失性存储器和传感器器件中的应用潜力。该提议的具体目标是：(I)设计和制造具有大导通电流和近零关态电流的拓扑绝缘体晶体管；(Ii)探索栅极设计和器件几何结构，以实现对自旋极化电子电流的稳健而有效的控制；(Iii)将自旋极化电子电流用于基于自旋的逻辑和非易失性存储器件，具有低功耗操作；以及(Iv)开发所产生的器件，以增强高灵敏度和选择性的红外传感器的拓扑光电效应。这项研究包括新型拓扑绝缘体纳米线和薄膜的制备、纳米级器件的集成和表征，重点是首次实现高质量的拓扑绝缘体晶体管。拓扑绝缘体纳米线和薄膜将在晶片规模上生长，用于原位器件集成，以实现干净的器件界面和金属接触。拓扑绝缘体晶体管将采用工程化的栅极/源极/漏极接触和铁磁绝缘体/沟道界面来制造，以实现高通断电流比、大导通电流和陡峭的开关，并通过栅源电场有效地调节表面态。这项建议提供了一条从材料准备到器件集成和测量，再到专注于逻辑晶体管、非易失性存储器和传感器的应用的完整路线。该奖项反映了NSF的法定使命，并通过使用基金会的智力优势和更广泛的影响审查标准进行评估，被认为值得支持。

Relentless, Exponential progress on Complementary Metal-Oxide-Semiconductor (CMOS) technology over the last four decades has made possible the design and fabrication of the powerful silicon chips which are the engines of the microelectronics revolution which changed contemporary society: Computers, Smart Phones, Internet of things (IoT), Artificial Intelligence (AI), and the list goes on, there is no aspect of modern life that has not been touched by the silicon chip. Progress on conventional CMOS technology has however slowed down significantly, as miniaturization (according to Moore's Law) is reaching fundamental, physics imposed limits. To make progress possible "beyond CMOS", researchers around the world consider new approaches to use new materials (for example, topological insulators), and invent new types of transistors and new types of high-speed, high-density and low-power memory technology. Consequently, the goal of the research in this proposal is to further exploit our understanding of the properties of topological insulator nanowires and thin films to build new-concept field effect transistors with operational principles different than the conventional CMOS technology, while continuing to benefit from the existing vast experience semiconductor industry has accumulated over the years with this technology (CMOS). If successful, the outcomes of the proposed research will also include new memory devices and sensors, made possible by these topological insulator transistors. Graduate, undergraduates and high-school students will have the opportunity to interact with collaborators from Industry and Government Laboratories. The goal of the proposed research is to design and fabricate Topological- Insulator Field-Effect transistors platform to explore and exploit the potential of gate-controlled topological surface state for applications in new-concept nonvolatile memory and sensor devices. The specific aims of this proposal are: (i) to design and fabricate topological insulator transistors with large on-state current and near-zero off-state current; (ii) to explore gate design and device geometry for achieving robust and efficient control of the spin-polarized electron current; (iii) to exploit the spin-polarized electron current for spin-based logic and nonvolatile memory devices with low-power operation; and (iv) to exploit the resulting devices for enhancing the topological photoelectronic effect for infrared sensors with high sensitivity and selectivity. The research involves preparation of novel topological insulator nanowires and thin films, nanoscale device integration, and characterization, with a focus on achieving in the first instance high-quality topological insulator transistors. The topological insulator nanowires and thin films will be grown at wafer scale for in-situ device integration to achieve clean device interfaces and metal contacts. The topological insulator transistors will be fabricated with engineered gate/source/drain contacts and ferromagnetic insulator/channel interface to achieve: high on/off current ratio, large on-state current and sharp switching, with surface states efficiently tuned by the gate-source electric field. This proposal presents a complete route from materials preparation, to device integration and measurement, to applications focusing on logic transistors, nonvolatile memory and sensors.This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.