PFI-RP: Next-Generation Microcontroller for the Era of Internet of Smart Things

PFI-RP：智能物联网时代的下一代微控制器

• 批准号: 1919147
• 负责人: Mingoo Seok
• 金额: $ 55万
• 依托单位: Columbia University
• 依托单位国家: 美国
• 项目类别: Standard Grant
• 财政年份: 2019
• 资助国家: 美国
• 起止时间: 2019-08-01 至 2024-07-31
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=1919147&HistoricalAwards=false
• 关键词: PFI; RP; Next; Generation; Microcontroller

The broader impact/commercial potential of this Partnerships for Innovation - Research Partnerships (PFI-RP) project is to develop and commercialize the technologies to create the next generation hardware for microcontrollers (a type of computer chip). The market of the microcontroller-based devices has been rapidly growing and expected to continue, thanks to recent trends such as the Internet of Things (IoT), wearables, smart buildings, mobile robots, drones, etc. This market has been seeking microcontroller hardware that consumes very little power to extend the battery life. This market also has been seeking to increase computing capability to meet the growing need of complex workloads, such as a neural network algorithm, without much-increasing power consumption. However, since they were first developed multiple decades ago, microcontrollers have undergone rather incremental improvements and cannot support those emerging needs. The proposed technology, if successful, will create next-generation microcontroller hardware to achieve significantly higher performance, power-efficiency, and robustness, thereby supporting this critical market demand and posing a strong value proposition. The proposed project will further develop several recent NSF-funded research results. The near- and sub-threshold voltage (NTV, STV) techniques, where the supply voltage is scaled down to a half to a quarter of the nominal level, has been considered one of the most effective ways to reduce power consumption. However, this approach has not been widely accepted because the hardware quickly loses robustness across operating conditions (temperature), manufacturing process variations, and long-term device aging. This problem becomes even worse with non-Von-Neumann hardware accelerators and analog-mixed-signal building blocks in the microcontroller system-on-chip. This project's objective is to create and commercialize the technologies that can effectively address the robustness challenge and thus achieve one to two orders of magnitude better power-efficiency and performance. The proposed effort in this project will be centered on creating power/area-efficient in-situ error detection and correction circuits (EDAC) and on-chip integrated digital voltage regulators and DC-DC converters that are applicable for commercial microcontrollers, non-Von-Neumann neural-network accelerators, and analog-mixed-signal building blocks. The anticipated result of the project is the silicon prototype of the next-generation microcontroller hardware integrating the developed technologies, demonstrating largely improved performance, power, and robustness.This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.

该创新-研究伙伴关系（PFI-RP）项目的更广泛影响/商业潜力是开发和商业化技术，为微控制器（一种计算机芯片）创建下一代硬件。基于微控制器的设备的市场一直在快速增长，并预计将继续，由于最近的趋势，如物联网（IoT），可穿戴设备，智能建筑，移动的机器人，无人机等，这个市场一直在寻求微控制器硬件，消耗很少的功率，以延长电池寿命。这个市场也一直在寻求提高计算能力，以满足复杂工作负载（如神经网络算法）日益增长的需求，而不会大幅增加功耗。然而，自从几十年前首次开发以来，微控制器已经经历了相当渐进的改进，无法支持这些新兴的需求。如果成功，所提出的技术将创造下一代微控制器硬件，以实现更高的性能、能效和鲁棒性，从而支持这一关键的市场需求，并提出强大的价值主张。拟议的项目将进一步发展最近NSF资助的几项研究成果。 近阈值电压和亚阈值电压（NTV、STV）技术，其中电源电压按比例缩小到标称电平的一半到四分之一，已被认为是降低功耗的最有效方法之一。然而，这种方法尚未被广泛接受，因为硬件在操作条件（温度）、制造工艺变化和长期设备老化下很快失去鲁棒性。在微控制器片上系统中使用非冯·诺依曼硬件加速器和模拟混合信号构建块时，这个问题变得更加严重。该项目的目标是创建并商业化能够有效解决鲁棒性挑战的技术，从而实现一到两个数量级的功率效率和性能提升。该项目的拟议工作将集中在创建功率/面积高效的原位错误检测和校正电路（EDAC）和片上集成数字稳压器和DC-DC转换器，适用于商业微控制器，非冯诺依曼神经网络加速器和模拟混合信号构建模块。该项目的预期成果是集成了已开发技术的下一代微控制器硬件的硅原型，展示了大幅提高的性能、功率和鲁棒性。该奖项反映了NSF的法定使命，并通过使用基金会的智力价值和更广泛的影响审查标准进行评估，被认为值得支持。

项目成果

DIMC: 2219TOPS/W 2569F2/b Digital In-Memory Computing Macro in 28nm Based on Approximate Arithmetic Hardware

DIMC：基于近似算术硬件的 28nm 2219TOPS/W 2569F2/b 数字内存计算宏

• DOI: 10.1109/isscc42614.2022.9731659
• 发表时间: 2022
• 期刊: 2022 IEEE International Solid- State Circuits Conference (ISSCC
• 作者: Wang, Dewei;Lin, Chuan-Tung;Chen, Gregory K.;Knag, Phil;Krishnamurthy, Ram K.;Seok, Mingoo
• 通讯作者: Seok, Mingoo

iMCU: A 102-μJ, 61-ms Digital In-Memory Computingbased Microcontroller Unit for Edge TinyML

iMCU：适用于 Edge TinyML 的 102μJ、61ms 数字内存计算微控制器单元

• DOI: 10.1109/cicc57935.2023.10121221
• 发表时间: 2023
• 期刊: 2023 IEEE Custom Integrated Circuits Conference (CICC
• 作者: Lin, Chuan-Tung;Huang, Paul Xuanyuanliang;Oh, Jonghyun;Wang, Dewei;Seok, Mingoo
• 通讯作者: Seok, Mingoo

A Metastability Risk Prediction and Mitigation Technique for Clock-Domain Crossing With Single-Stage Synchronizer in Near-Threshold-Voltage Multivoltage/ Frequency-Domain Network-on-Chip

• DOI: 10.1109/jssc.2023.3283961
• 发表时间: 2024-02
• 期刊: IEEE Journal of Solid-State Circuits
• 影响因子: 5.4
• 作者: Chuxiong Lin;Weifeng He;Yanan Sun;Lin Shao;Bo Zhang;Jun Yang;Mingoo Seok

TICA: A 0.3V, Variation-Resilient 64-Stage Deeply-Pipelined Bitcoin Mining Core with Timing Slack Inference and Clock Frequency Adaption

TICA：具有时序松弛推理和时钟频率自适应功能的 0.3V、抗变化 64 级深度流水线比特币挖矿内核

• DOI: 10.1109/cicc53496.2022.9772803
• 发表时间: 2022
• 期刊: 2022 IEEE Custom Integrated Circuits Conference (CICC
• 作者: Li, Jieyu;He, Weifeng;Zhang, Bo;He, Guanghui;Yang, Jun;Seok, Mingoo
• 通讯作者: Seok, Mingoo

KTAN: Knowledge Transfer Adversarial Network

• DOI: 10.1109/ijcnn48605.2020.9207235
• 发表时间: 2018-10
• 期刊: 2020 International Joint Conference on Neural Networks (IJCNN)
• 作者: Peiye Liu;Wu Liu;Huadong Ma;Tao Mei;Mingoo Seok