EAGER: Globally-Analog Locally-Digital Computing for Accelerating Scientific Computation

EAGER：加速科学计算的全球模拟本地数字计算

• 批准号: 1840763
• 负责人: Mingoo Seok
• 金额: $ 30万
• 依托单位: Columbia University
• 依托单位国家: 美国
• 项目类别: Standard Grant
• 财政年份: 2018
• 资助国家: 美国
• 起止时间: 2018-10-01 至 2024-03-31
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=1840763&HistoricalAwards=false
• 关键词: EAGER; Globally; Analog; Locally; Digital

As Moore's law relationship between computing cost versus performance gradually plateaus, and the need for large scale computing is increases, novel computing paradigms need to be urgently explored. In this larger scenario, this project attempts to address the specific problem of scaling up high performance scientific computing applications via a novel paradigm that is based on silicon CMOS technologies. The results from this high-risk endeavor will be used in the classroom at an advanced graduate and undergraduate levels, with the experience gained from the project enabling these students to become the new workforce of future computing technologies. Conventional digital computing for solving large scientific problems runs into problems of energy efficiency and computing delays. Analog computing has the potential to solve these problems, but has other potential drawbacks namely that of scalability to large problems, noise susceptibility etc. This project will combine the benefits of analog and the digital world by designing a mixed analog-digital hardware. Solution of nonlinear stiff systems of differential equations arising in high performance scientific computing problems will be attempted as a first target application. The goal is to utilize analog processing to quickly get to an approximate solution first, and subsequently refine the solution by a small number of iterations via clock-less digital hardware. In this way, while the scalability issue is addressed and at the same time convergence of the digital iterations to an optimal solution is to be achieved faster and at the expense of lower energy.This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.

随着计算成本与性能之间的摩尔定律关系逐渐趋于平台期，以及对大规模计算的需求不断增加，迫切需要探索新的计算范例。在这个更大的场景中，该项目试图通过基于硅CMOS技术的新范例来解决扩大高性能科学计算应用的具体问题。这一高风险努力的结果将用于高级研究生和本科生的课堂，以及从该项目中获得的经验，使这些学生能够成为未来计算技术的新劳动力。解决大型科学问题的传统数字计算遇到了能源效率和计算延迟的问题。模拟计算具有解决这些问题的潜力，但也有其他潜在的缺点，即对大型问题的可扩展性、对噪声的敏感性等。该项目将通过设计一种混合的模拟-数字硬件来结合模拟和数字世界的优点。在高性能科学计算问题中出现的非线性刚性微分方程组的求解将被尝试作为第一个目标应用。我们的目标是首先利用模拟处理快速得到近似解，然后通过无时钟的数字硬件通过少量迭代来改进解决方案。这样，在解决可伸缩性问题的同时，数字迭代向最佳解决方案的收敛将以更快的速度实现，并以较低的能量为代价。该奖项反映了NSF的法定使命，并通过使用基金会的智力优势和更广泛的影响审查标准进行评估，被认为值得支持。

项目成果

INTIACC: A 32-bit Floating-Point Programmable Custom-ISA Accelerator for Solving Classes of Partial Differential Equations

INTIACC：用于求解偏微分方程类的 32 位浮点可编程自定义 ISA 加速器

• DOI: 10.1109/esscirc55480.2022.9911441
• 发表时间: 2022
• 期刊: ESSCIRC 2022- IEEE 48th European Solid State Circuits Conference (ESSCIRC
• 作者: Huang, Paul Xuanyuanliang;Jang, Daniel;Tsividis, Yannis;Seok, Mingoo
• 通讯作者: Seok, Mingoo