SaTC: CORE: Small: Trustworthy System-On-Chip Design using Secure On-Chip Communication Architecture
SaTC: CORE: Small: Trustworthy System-On-Chip Design using Secure On-Chip Communication Architecture
批准号:
1936040
负责人:
Prabhat Mishra
金额:
$50.0万
依托单位:
依托单位国家:
美国
项目类别:
Standard Grant
财政年份:
2019
资助国家:
美国
项目状态:
已结题
起止时间:
2019-10-01 至 2024-09-30
中文摘要
片上系统(SoC)是各种电子系统中计算和通信的驱动力,从智能家居中的简单设备到卫星中的复杂系统。片上网络(NoC)是复杂SoC中元器件间片上通信的常用解决方案。为了满足成本和上市时间的限制,SoC的设计使用了各种硬件组件,这些组件通常来自不可信的第三方供应商。尽管可信通信在整个系统安全中的重要性与日俱增,但NoC安全性的研究相对较少。该项目将开发一个安全的NoC体系结构,以实现基于NoC的SoC中组件之间的可信通信。第一个目标是开发自动化工具和技术,在满足能源和性能要求以及实时限制的同时,适用于包括电、光和无线NOC在内的各种通信技术。第二个目标是开发一个安全和轻量级的片上通信体系结构,该体系结构能够实现安全的数据通信,匿名路由来维护通信隐私,在恶意组件存在的情况下找到可信路径,实时检测和定位拒绝服务攻击和缓冲区溢出攻击,以及验证和评估NoC安全体系结构。该项目的更广泛的影响有三个方面:桥接计算和通信安全,研究和教育的整合,以及本科生和少数族裔学生的参与。当与现有安全解决方案相结合时,安全的NoC架构将支持使用不可信组件的可信SoC设计。与不同公司的持续合作将使安全解决方案在工业SoC上的应用成为可能。该项目将通过开发带有国家奥委会安全模块的经修改的课程,以及通过出版物、研讨会、教程和小组来传播研究成果,从而将研究和教育活动结合起来。该项目将涉及女性和代表性不足的少数族裔学生。这个项目预计将产生各种各样的数据,这些数据将对工程界未来的研究和教育有极大的帮助。在该项目中产生的知识、工具、方法和数据将通过项目网页(https://www.cise.ufl.edu/research/cad/NoC.html).公开提供该网页将包括与NoC安全架构相关的所有材料以及相关工具和技术,以在各种片上通信架构中实现增量加密和身份验证、信任感知路由、匿名路由以及实时攻击检测和本地化。该奖项反映了NSF的法定使命,并通过使用基金会的智力优势和更广泛的影响审查标准进行评估,被认为值得支持。
英文摘要
System-on-Chip (SoC) is the driving force behind computing and communication in a wide variety of electronic systems, ranging from simple devices in smart homes to complex systems in satellites. Network-on-Chip (NoC) is a commonly used solution for on-chip communication between components in complex SoCs. To meet cost and time-to-market constraints, SoCs are designed using various hardware components, often gathered from untrusted third-party vendors. Despite increasing importance of trusted communication in overall system security, NoC security is relatively under-investigated. This project will develop a secure NoC architecture to enable trusted communication between components in NoC-based SoCs.This project has two important objectives. The first objective is to develop automated tools and techniques that work across diverse communication technologies including electrical, optical and wireless NoCs while meeting energy and performance requirements as well as real-time constraints. The second objective is to develop a secure and lightweight on-chip communication architecture that enables secure data communication, anonymous routing to maintain communication privacy, finding trusted paths in the presence of malicious components, real-time detection and localization of denial-of-service and buffer overflow attacks, and validation and evaluation of NoC security architectures.The broader impacts of this project are three-fold: bridging computation and communication security, integration of research and education, and involvement of undergraduates and minority students. Secure NoC architecture will enable trusted SoC design with untrusted components when combined with existing security solutions. Ongoing collaboration with different companies will enable the application of the security solutions on industrial SoCs. This project will integrate research and educational activities by developing modified courses with an NoC security module, as well as dissemination of research results through publications, seminars, tutorials and panels. This project will involve female and under-represented minority students. This project is expected to produce a wide variety of data that would be immensely helpful for future research and education in the engineering community. Knowledge, tools, methodologies and data generated in this project will be made publicly available through the project web page (https://www.cise.ufl.edu/research/cad/NoC.html). The web page will include all the relevant materials related to NoC security architecture as well as associated tools and techniques to enable incremental encryption and authentication, trust-aware routing, anonymous routing, and real-time attack detection and localization, in a wide variety of on-chip communication architectures.This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.
期刊论文(16)
专著(0)
科研奖励(0)
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Data Criticality in Multithreaded Applications: An Insight for Many-Core Systems
多线程应用程序中的数据关键性:对众核系统的见解
DOI:
10.1109/tvlsi.2021.3092218
发表时间:
2021
期刊:
IEEE Transactions on Very Large Scale Integration (VLSI
影响因子:
--
作者:
[Das, Abhijit, Jose, John, Mishra, Prabhat]
通讯作者:
Mishra, Prabhat
DOI:
10.1109/nocs50636.2020.9241711
发表时间:
2020-09
期刊:
2020 14th IEEE/ACM International Symposium on Networks-on-Chip (NOCS)
影响因子:
--
作者:
[M. Rajan;Abhijit Das;John Jose;P. Mishra]
通讯作者:
M. Rajan;Abhijit Das;John Jose;P. Mishra
Eavesdropping Attack Detection using Machine Learning in Network-on-Chip Architectures
在片上网络架构中使用机器学习进行窃听攻击检测
DOI:
10.1109/mdat.2022.3202995
发表时间:
2022
期刊:
IEEE Design & Test
影响因子:
2
作者:
[Sudusinghe, Chamika, Charles, Subodha, Ahangama, Sapumal, Mishra, Prabhat]
通讯作者:
Mishra, Prabhat
Lightweight and Trust-Aware Routing in NoC-Based SoCs
基于 NoC 的 SoC 中的轻量级和信任感知路由
DOI:
10.1109/isvlsi49217.2020.00038
发表时间:
2020
期刊:
IEEE Computer Society Annual Symposium on VLSI (ISVLSI
影响因子:
--
作者:
[Charles, Subodha, Mishra, Prabhat]
通讯作者:
Mishra, Prabhat
Lightweight Anonymous Routing in NoC based SoCs
基于 NoC 的 SoC 中的轻量级匿名路由
DOI:
10.23919/date48585.2020.9116572
发表时间:
2020
期刊:
Design Automation & Test in Europe (DATE
影响因子:
--
作者:
[Charles, Subodha, Logan, Megan, Mishra, Prabhat]
通讯作者:
Mishra, Prabhat
共 15 条
SHF: Small: Design-for-Debug Architecture for Post-Silicon Security Validation
-
批准号:1908131
-
项目类别:Standard Grant
-
资助金额:$50.0万
-
财政年份:2019
-
负责人:Prabhat Mishra
-
依托单位:
CSR: Small: Collaborative Research: Dynamic Reconfiguration for Adaptive Computing in Heterogeneous SoCs
-
批准号:1526687
-
项目类别:Standard Grant
-
资助金额:$26.0万
-
财政年份:2015
-
负责人:Prabhat Mishra
-
依托单位:
SaTC: STARSS: Collaborative: IPTrust: A Comprehensive Framework for IP Integrity Validation
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批准号:1441667
-
项目类别:Standard Grant
-
资助金额:$13.0万
-
财政年份:2014
-
负责人:Prabhat Mishra
-
依托单位:
SHF: Small: Automated Techniques for Efficient Post-Silicon Validation and Debug of Integrated Circuits
-
批准号:1218629
-
项目类别:Continuing Grant
-
资助金额:$45.0万
-
财政年份:2012
-
负责人:Prabhat Mishra
-
依托单位:
CSR:Small: Novel Techniques for Lossless Data Compression and Efficient Decompression in Heterogeneous Embedded Systems
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批准号:0915376
-
项目类别:Standard Grant
-
资助金额:$10.0万
-
财政年份:2009
-
负责人:Prabhat Mishra
-
依托单位:
CAREER: New Directions in Functional Verification of Heterogeneous Multicore Architectures
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批准号:0746261
-
项目类别:Continuing Grant
-
资助金额:$32.0万
-
财政年份:2008
-
负责人:Prabhat Mishra
-
依托单位:
国内基金
海外基金
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