SHF: Small: Automated Techniques for Efficient Post-Silicon Validation and Debug of Integrated Circuits
SHF: Small: Automated Techniques for Efficient Post-Silicon Validation and Debug of Integrated Circuits
批准号:
1218629
负责人:
Prabhat Mishra
金额:
$45.0万
依托单位:
依托单位国家:
美国
项目类别:
Continuing Grant
财政年份:
2012
资助国家:
美国
项目状态:
已结题
起止时间:
2012-07-01 至 2017-06-30
中文摘要
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英文摘要
Due to increasing design complexity coupled with shrinking time-to-market constraints, it is not possible to detect all design flaws during pre-silicon validation of System-on-Chip (SoC) designs. Post-silicon validation needs to capture these escaped functional errors as well as electrical faults. Various studies suggest that post-silicon validation consumes almost half of the overall SoC design effort (total cost). A major concern during post-silicon debug is the observability of internal signals since the chip has already been manufactured. Design overhead considerations limit the number of signals that can be traced or stored in a trace buffer. The central objective of this project is to develop automated tools and techniques for efficient post-silicon validation and debug of integrated circuits. To achieve this goal, this project will investigate the synergistic integration of four innovative concepts: i) debug-friendly trace signal selection, ii) efficient trace hardware design, iii) observability-aware directed test generation, and iv) high-level debug to reproduce post-silicon errors. A successful implementation of this research is expected to reduce the post-silicon validation and debug effort by several orders of magnitude.This project will make significant broader impact in several fronts. The tools and techniques resulted from this project will empower designers to reuse pre-silicon verification efforts for post-silicon validation in order to reduce overall validation cost and improve design quality. The outcome of this research has direct impact on everyday life. Improved validation techniques will have double impact: (i) low-cost and high-quality embedded systems (e.g., everyday appliances) for the public and (ii) improved accuracy of the safety-critical devices. Going beyond integrated circuits and systems, some of the analysis and validation techniques resulting from this work can be applied to other areas of science and engineering including validation of embedded software and dynamic monitoring of autonomous systems. This project will integrate research and educational activities through development of courses on post-silicon validation as well as dissemination of research results through publications, seminars, and tutorials. The PI will involve minority undergraduate students in this project through UMMP and SEAGEP programs at University of Florida.
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批准号:1936040
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项目类别:Standard Grant
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资助金额:$50.0万
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财政年份:2019
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负责人:Prabhat Mishra
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依托单位:
SHF: Small: Design-for-Debug Architecture for Post-Silicon Security Validation
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批准号:1908131
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项目类别:Standard Grant
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资助金额:$50.0万
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财政年份:2019
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负责人:Prabhat Mishra
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依托单位:
CSR: Small: Collaborative Research: Dynamic Reconfiguration for Adaptive Computing in Heterogeneous SoCs
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批准号:1526687
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项目类别:Standard Grant
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资助金额:$26.0万
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财政年份:2015
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负责人:Prabhat Mishra
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SaTC: STARSS: Collaborative: IPTrust: A Comprehensive Framework for IP Integrity Validation
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批准号:1441667
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资助金额:$13.0万
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财政年份:2014
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CSR:Small: Novel Techniques for Lossless Data Compression and Efficient Decompression in Heterogeneous Embedded Systems
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批准号:0915376
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项目类别:Standard Grant
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资助金额:$10.0万
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财政年份:2009
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负责人:Prabhat Mishra
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依托单位:
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批准号:0746261
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项目类别:Continuing Grant
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资助金额:$32.0万
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财政年份:2008
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负责人:Prabhat Mishra
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依托单位:
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