SHF: Small: Automated Techniques for Efficient Post-Silicon Validation and Debug of Integrated Circuits

由于设计复杂性的增加以及上市时间的缩短，在片上系统（SoC）设计的预硅验证期间不可能检测到所有设计缺陷。后硅验证需要捕获这些未被捕获的功能错误以及电气故障。各种研究表明，硅后验证几乎消耗了SoC总体设计工作量（总成本）的一半。在后硅调试期间的一个主要问题是内部信号的可观察性，因为芯片已经制造出来了。对设计开销的考虑限制了可以跟踪或存储在跟踪缓冲区中的信号的数量。该项目的中心目标是开发自动化的工具和技术，用于有效的后硅验证和集成电路的调试。为了实现这一目标，该项目将研究四个创新概念的协同集成：i)调试友好的跟踪信号选择，ii)高效的跟踪硬件设计，iii)可观察性感知的定向测试生成，以及iv)高级调试以重现后硅错误。这项研究的成功实施有望将硅后验证和调试工作减少几个数量级。该项目将在几个方面产生更广泛的重大影响。这个项目产生的工具和技术将使设计人员能够在硅后验证中重用硅前验证工作，从而降低总体验证成本并提高设计质量。这项研究的结果直接影响到我们的日常生活。改进的验证技术将产生双重影响：(i)为公众提供低成本和高质量的嵌入式系统（例如，日常用具）和（ii）提高安全关键设备的准确性。除了集成电路和系统之外，这项工作产生的一些分析和验证技术可以应用于其他科学和工程领域，包括嵌入式软件的验证和自主系统的动态监控。该项目将通过开发后硅验证课程，以及通过出版物、研讨会和教程传播研究成果，将研究和教育活动结合起来。PI将通过佛罗里达大学的UMMP和SEAGEP项目让少数民族本科生参与该项目。

Due to increasing design complexity coupled with shrinking time-to-market constraints, it is not possible to detect all design flaws during pre-silicon validation of System-on-Chip (SoC) designs. Post-silicon validation needs to capture these escaped functional errors as well as electrical faults. Various studies suggest that post-silicon validation consumes almost half of the overall SoC design effort (total cost). A major concern during post-silicon debug is the observability of internal signals since the chip has already been manufactured. Design overhead considerations limit the number of signals that can be traced or stored in a trace buffer. The central objective of this project is to develop automated tools and techniques for efficient post-silicon validation and debug of integrated circuits. To achieve this goal, this project will investigate the synergistic integration of four innovative concepts: i) debug-friendly trace signal selection, ii) efficient trace hardware design, iii) observability-aware directed test generation, and iv) high-level debug to reproduce post-silicon errors. A successful implementation of this research is expected to reduce the post-silicon validation and debug effort by several orders of magnitude.This project will make significant broader impact in several fronts. The tools and techniques resulted from this project will empower designers to reuse pre-silicon verification efforts for post-silicon validation in order to reduce overall validation cost and improve design quality. The outcome of this research has direct impact on everyday life. Improved validation techniques will have double impact: (i) low-cost and high-quality embedded systems (e.g., everyday appliances) for the public and (ii) improved accuracy of the safety-critical devices. Going beyond integrated circuits and systems, some of the analysis and validation techniques resulting from this work can be applied to other areas of science and engineering including validation of embedded software and dynamic monitoring of autonomous systems. This project will integrate research and educational activities through development of courses on post-silicon validation as well as dissemination of research results through publications, seminars, and tutorials. The PI will involve minority undergraduate students in this project through UMMP and SEAGEP programs at University of Florida.