FET: Small: Design Optimization of Silicon Photonic Integrated Circuits under Fabrication Process Variations

FET：小型：制造工艺变化下硅光子集成电路的设计优化

• 批准号: 2006788
• 负责人: Mahdi Nikdast
• 金额: $ 50万
• 依托单位: Colorado State University
• 依托单位国家: 美国
• 项目类别: Standard Grant
• 财政年份: 2020
• 资助国家: 美国
• 起止时间: 2020-06-15 至 2024-05-31
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=2006788&HistoricalAwards=false
• 关键词: FET; Small; Design; Optimization; Silicon

Silicon photonics technology has made it possible to realize fully integrated photonic circuits with sub-micron silicon photonic devices. As a result, small and mobile photonic circuits can be developed that can perform a variety of optical functions for different applications, but with much lower cost and energy consumption. However, there is a fundamental issue that has limited the emergence of silicon photonic integrated circuits: the underlying silicon photonic devices in these circuits are extremely sensitive to fabrication-process variations. Indeed, nanometer-scale variations in the critical dimensions of silicon photonic devices considerably degrade the performance of the resulting circuits and even cause circuit failures. Unfortunately, the inability to efficiently characterize and compensate for fabrication-process variations have so far limited the development of cost-effective silicon photonic integrated circuits capable of delivering the true potential of silicon photonics. To combat this, the project involves research to realize energy-efficient and complex silicon photonic integrated circuits for different real-world applications that will be fully functional even in the presence of variation-plagued components. In addition, this project will create training opportunities for industrial participants and students at different levels to work on real-world problems while emphasizing the inclusion of underrepresented groups, thereby improving the education infrastructure and training highly skilled practitioners.The project contributions will involve developing: 1) comprehensive models of systematic and stochastic process variations in silicon photonics while incorporating both the probabilistic and non-probabilistic nature of uncertainties; 2) a framework to optimize silicon photonic sub-circuits and circuits under fabrication-process variations during design-time; and, and 3) energy-efficient circuit-level solutions to efficiently compensate for the impact of fabrication-process variations during run-time. For characterizing different variations, novel silicon photonic test structures and analytical algorithms will be designed to model different sources of fabrication-process variations and their impact. Efficient and compact stochastic analytical models will be developed to extensively explore and optimize silicon photonic sub-circuit and circuit performance under variations. For design-time optimization, the silicon-photonic integrated-circuit design problem will be modeled as a formal optimization problem to realize energy-efficient and robust circuits under fabrication-process variations. The performance under fabrication-process variations will be further improved by developing run-time self-correction mechanisms based on adaptive photonic signal multiplexing, robust signal routing and contention-management schemes, and dynamic adaptations for inexact circuit behavior under variations.This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.

硅光子学技术使得用亚微米硅光子器件实现全集成光子电路成为可能。因此，可以开发出小型和移动光子电路，可以为不同的应用执行各种光学功能，但成本和能耗要低得多。然而，有一个基本问题限制了硅光子集成电路的出现：这些电路中的底层硅光子器件对制造工艺变化极其敏感。事实上，硅光子器件的关键尺寸在纳米尺度上的变化会大大降低电路的性能，甚至导致电路故障。不幸的是，到目前为止，由于无法有效地表征和补偿制造工艺的变化，限制了具有成本效益的硅光子集成电路的发展，从而无法发挥硅光子学的真正潜力。为了解决这个问题，该项目涉及研究实现节能和复杂的硅光子集成电路，用于不同的现实世界应用，即使在存在变化困扰的组件的情况下也能完全发挥作用。此外，该项目将为不同层次的工业参与者和学生创造培训机会，以解决现实问题，同时强调纳入代表性不足的群体，从而改善教育基础设施和培训高技能从业者。项目贡献将涉及发展：1)硅光子学系统和随机过程变化的综合模型，同时结合不确定性的概率和非概率性质；2)在设计阶段优化硅光子子电路和制造工艺变化电路的框架；3)高效节能的电路级解决方案，以有效地补偿运行期间制造工艺变化的影响。为了表征不同的变化，将设计新的硅光子测试结构和分析算法来模拟不同来源的制造工艺变化及其影响。将建立高效紧凑的随机分析模型，以广泛探索和优化硅光子子电路和电路在变化下的性能。为了优化设计时间，将硅光子集成电路设计问题建模为一个形式优化问题，以实现在制造工艺变化下的节能和鲁棒电路。通过开发基于自适应光子信号复用的运行时自校正机制，鲁棒信号路由和竞争管理方案，以及对变化下不精确电路行为的动态适应，可以进一步提高制造工艺变化下的性能。该奖项反映了美国国家科学基金会的法定使命，并通过使用基金会的知识价值和更广泛的影响审查标准进行评估，被认为值得支持。

项目成果

Optimizing Coherent Integrated Photonic Neural Networks under Random Uncertainties

随机不确定性下优化相干集成光子神经网络

• 发表时间: 2021
• 期刊: IEEE/OSA Optical Networking and Communication Conference & Exhibition (OFC
• 作者: Banerjee, Sanmitra;Nikdast, Mahdi;Chakrabarty, Krishnendu
• 通讯作者: Chakrabarty, Krishnendu

A Survey on Optical Phase-Change Memory: The Promise and Challenges

• DOI: 10.1109/access.2023.3241146
• 发表时间: 2023
• 期刊: IEEE Access
• 影响因子: 3.9
• 作者: Amin Shafiee;S. Pasricha;M. Nikdast

Pruning Coherent Integrated Photonic Neural Networks Using the Lottery Ticket Hypothesis

使用彩票假设修剪相干集成光子神经网络

• DOI: 10.1109/isvlsi54635.2022.00035
• 发表时间: 2022
• 期刊: Proc. IEEE Computer Society Annual Symposium on VLSI (ISVLSI
• 作者: Banerjee, Sanmitra;Nikdast, Mahdi;Pasricha, Sudeep;Chakrabarty, Krishnendu
• 通讯作者: Chakrabarty, Krishnendu

LORAX: Loss-Aware Approximations for Energy-Efficient Silicon Photonic Networks-on-Chip

• DOI: 10.1145/3386263.3406919
• 发表时间: 2020-02
• 期刊: Proceedings of the 2020 on Great Lakes Symposium on VLSI
• 作者: Febin P. Sunny;Asif Mirza;Ishan G. Thakkar;S. Pasricha;M. Nikdast

Machine Learning Accelerators in 2.5D Chiplet Platforms with Silicon Photonics

• DOI: 10.23919/date56975.2023.10137317
• 发表时间: 2023-01
• 期刊: 2023 Design, Automation & Test in Europe Conference & Exhibition (DATE)
• 作者: Febin P. Sunny;Ebadollah Taheri;M. Nikdast;S. Pasricha