Collaborative Research: SHF: Small: Tangram: Scaling into the Exascale Era with Reconfigurable Aggregated "Virtual Chips"

由于技术规模的限制，通用处理器的设计正在达到性能瓶颈。基于芯片的系统通过将小芯片(芯片)集成到一个封装中，提供了一个很有前途的解决方案。芯片还支持离散芯片体系结构的异类集成，如CPU、GPU、DSP和FPGA。然而，基于小芯片的高性能系统的设计面临着严峻的挑战：小芯片间的通信是一个关键的瓶颈；小芯片之间需要有效地共享资源以提高性价比；电源和热管理需要优化以实现更好的封装内集成。因此，这种设计需要采取更全面的方法，需要对处理节点、存储和互连结构的交叉问题进行调查。本研究提出用异构型聚合芯片构建虚拟芯片，使系统既能获得单片超级芯片的性能优势，又能打破可伸缩性瓶颈。该项目的一个主要成果将是一套优化方法，这些方法能够设计出可重新配置的架构，利用混合无线互联来无缝连接计算和存储组件。为此，研究目标包括：(1)设计可重构架构以打破芯片边界以实现高效的资源共享；(2)开发模型以量化应用与硬件资源之间的交互以快速探索设计空间；(3)设计混合无线互连网络以无缝地弥合芯片之间的物理差距并通过无线网络的灵活性来实现可重构架构；(4)设计新型无线天线以提高能量和热效率。由于其交叉性质，拟议的研究有可能改变高性能、高能效和高成本效益的系统的设计，以满足带宽和性能需求不断增长的新兴应用的需求。这项研究的教育贡献包括将研究与教学和培训相结合，设计以培训未来工程师为重点的教程和研讨会，以及与行业互动以加快技术转让。作为拟议项目的一部分，通过外展活动，将吸引更多的本科生和少数族裔学生进入这个工程领域。该奖项反映了NSF的法定使命，并通过使用基金会的智力优势和更广泛的影响审查标准进行评估，被认为值得支持。

The design of general-purpose processors is reaching a performance bottleneck due to the limitations in technology scaling. Chiplet-based systems offer a promising solution by integrating small dies (chiplets) inside one package. Chiplets also enable heterogeneous integration of discrete chip architectures, such as CPUs, GPUs, DSPs, and FPGAs. However, the design of high-performance chiplet-based systems faces serious challenges: inter-chiplet communication is a critical bottleneck; resource needs to be efficiently shared among the chiplets to improve the performance-cost ratio; power and thermal management need to be optimized for better in-package integration. Consequently, such designs need to take a more holistic approach, and investigations are needed on the cross-cutting issues across the processing nodes, storage and interconnection fabric. This research proposes to build "virtual chips" from heterogeneous aggregated chiplets, so that the system can not only reap the performance benefit of a monolithic super chip but also break the scalability bottleneck. A major outcome of the project will be a set of optimization methods that enable the design of a reconfigurable architecture, leveraging a hybrid wireless interconnection to seamlessly connect the computing and memory components. To this end, the research goals include: (1) design of reconfigurable architectures to break the chiplet boundaries for efficient resource sharing; (2) development of models to quantify interactions between the applications and hardware resources for fast design-space exploration; (3) design of a hybrid wireless interconnection network to seamlessly bridge the physical gaps between chiplets and enable reconfigurable architectures through the flexibility of wireless networks; and (4) design of novel wireless antennas to improve energy and thermal efficiency.The proposed research bridges the gap between multiple layers of the design stack: hardware architectures, networks and devices. Due to its cross-cutting nature, the proposed research has the potential to transform the design of high-performance, energy-efficient and cost-effective systems that are able to meet the demand of emerging applications with growing bandwidth and performance needs. The educational contributions of this research include integrating research with teaching and training, design of tutorials and workshops focusing on the training of future engineers, and interaction with industry to accelerate technology transfer. Through the outreach activities as part of the proposed project, more undergraduate and minority students will be attracted to this field of engineering.This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.