Collaborative Research: CNS Core:Small:IMPERIAL: In-Memory Processing Enhanced Racetrack Inspired by Accessing Laterally

协作研究:CNS Core:Small:IMPERIAL:受横向访问启发的内存处理增强赛道

基本信息

  • 批准号:
    2133267
  • 负责人:
  • 金额:
    $ 32万
  • 依托单位:
  • 依托单位国家:
    美国
  • 项目类别:
    Standard Grant
  • 财政年份:
    2021
  • 资助国家:
    美国
  • 起止时间:
    2021-10-01 至 2024-09-30
  • 项目状态:
    已结题

项目摘要

Next generation mobile systems require memory and storage with unprecedented density and access speed that meets strict power/energy and reliability constraints. Moreover, these systems can benefit from application specific acceleration on data intensive workloads. For instance, Internet of Things (IoT) devices are tasked with acquiring, storing, and processing vast amounts of acquired information. Edge systems may slightly relax power/energy constraints, but can benefit from acceleration of machine learning, security, or other application specific tasks while maintaining quality of service on tasks from simultaneous disparate users. This project explores applying a new and understudied emerging memory technology called domain-wall memory (DWM) and its application to the needs of mobile and edge devices. DWM has properties that can be exploited to increase storage density, access speed, and to relieve the memory access bottleneck that exists in modern systems. The PIs will leverage their expertise to create a cross-layer design approach spanning the device/circuit- through system-level to develop a novel cross-DWM (XDWM) memory architecture with lateral read and write access capabilities. These innovations will revolutionize storage and processing for next generation mobile and edge devices by providing synergistic data storage and efficient processing-in-memory (PIM) with hooks for reliability. A cross-layer evaluation methodology will be adopted to cover prototype fabrication, device-level characterization, architecture-level simulation, and full system integration and emulation to explore the PIM. The transformative nature of this research is a disruptive new memory system that is dense, reliable, energy-efficient, ultra low latency with compute capability that can revolutionize the storage and processing capabilities of next generation computing systems. Such systems particularly include IoT, mobile and secure shared use edge systems but also apply to high performance computing and cloud systems. Further impacts of the proposed research include the integration of various education and advocacy activities based on the resources available to the two PIs such as (i) outreach for local K-12 students through Pitt's “Investing Now” summer school and USF's “Engineering Day” and Expo, where Engineering solutions are showcased to approximately 10,000 K-12 students/parents/teachers. (ii) inclusivity: Both PIs have a track record of including Under-represented Minority (URM) students.. They will continue to focus on URM representation in their team. (iii) curriculum: course integration of the research at both sites.This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.
下一代移动系统需要具有前所未有的密度和访问速度的内存和存储,以满足严格的功率/能源和可靠性限制。此外,这些系统还可以受益于针对数据密集型工作负载的特定于应用程序的加速。例如,物联网(IoT)设备的任务是获取、存储和处理海量获取的信息。EDGE系统可以略微放宽功率/能源限制,但可以从机器学习、安全或其他特定于应用的任务的加速中受益,同时保持对来自不同用户的任务的服务质量。该项目探索了一种新的、未被研究的新兴存储技术--域壁存储(DWM)及其在移动和边缘设备需求中的应用。可以利用DWM的特性来提高存储密度、访问速度,并缓解现代系统中存在的内存访问瓶颈。PI将利用他们的专业知识创建跨越设备/电路到系统级的跨层设计方法,以开发具有横向读写访问能力的新型跨DWM(XDWM)存储器体系结构。这些创新将通过提供协同的数据存储和高效的内存中处理(PIM)以及挂钩实现可靠性,彻底改变下一代移动和边缘设备的存储和处理。将采用跨层评估方法,涵盖原型制造、器件级表征、体系结构级仿真以及全面系统集成和仿真,以探索PIM。这项研究的变革性本质是一种颠覆性的新内存系统,该系统密度高、可靠、高能效、具有计算能力的超低延迟,可以彻底改变下一代计算系统的存储和处理能力。这类系统特别包括物联网、移动和安全共享使用边缘系统,但也适用于高性能计算和云系统。拟议研究的其他影响包括根据两个私人投资促进机构的现有资源整合各种教育和宣传活动,例如(I)通过皮特大学的“立即投资”暑期学校和美国联邦的“工程日”和博览会,向大约10,000名K-12学生/家长/教师展示工程解决方案,向当地的K-12学生进行外联。(2)包容性:两个私营部门主管机构都有吸纳代表不足的少数族裔学生的记录。他们将继续专注于他们团队中的URM代表。(Iii)课程:两个地点研究的课程整合。这一奖项反映了NSF的法定使命,并通过使用基金会的智力优势和更广泛的影响审查标准进行评估,被认为值得支持。

项目成果

期刊论文数量(3)
专著数量(0)
科研奖励数量(0)
会议论文数量(0)
专利数量(0)
Sustainable AI Processing at the Edge
边缘的可持续人工智能处理
  • DOI:
    10.1109/mm.2022.3220399
  • 发表时间:
    2023
  • 期刊:
  • 影响因子:
    3.6
  • 作者:
    Ollivier, Sebastien;Li, Sheng;Tang, Yue;Cahoon, Stephen;Caginalp, Ryan;Chaudhuri, Chayanika;Zhou, Peipei;Tang, Xulong;Hu, Jingtong;Jones, Alex K.
  • 通讯作者:
    Jones, Alex K.
Pod-racing: bulk-bitwise to floating-point compute in racetrack memory for machine learning at the edge
  • DOI:
    10.1109/mm.2022.3195761
  • 发表时间:
    2022-11
  • 期刊:
  • 影响因子:
    3.6
  • 作者:
    S. Ollivier;Xinyi Zhang;Yue Tang;C. Choudhuri;Jingtong Hu;A.K. Jones
  • 通讯作者:
    S. Ollivier;Xinyi Zhang;Yue Tang;C. Choudhuri;Jingtong Hu;A.K. Jones
Toward Comprehensive Shifting Fault Tolerance for Domain-Wall Memories with PIETT
利用 PIETT 实现域壁存储器的全面移位容错
  • DOI:
    10.1109/tc.2022.3188206
  • 发表时间:
    2022
  • 期刊:
  • 影响因子:
    3.7
  • 作者:
    Ollivier, Sebastien;Longofono, Stephen;Dutta, Prayash;Hu, Jingtong;Bhanja, Sanjukta;Jones, Alex K.
  • 通讯作者:
    Jones, Alex K.
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Jingtong Hu其他文献

FlexLevel NAND Flash Storage System Design to Reduce LDPC Latency
FlexLevel NAND 闪存存储系统设计可减少 LDPC 延迟
Stack-Size Sensitive On-Chip Memory Backup for Self-Powered Nonvolatile Processors
适用于自供电非易失性处理器的堆栈大小敏感片上内存备份
Development of A Real-time POCUS Image Quality Assessment and Acquisition Guidance System
实时 POCUS 图像质量评估和采集引导系统的开发
  • DOI:
    10.48550/arxiv.2212.08624
  • 发表时间:
    2022
  • 期刊:
  • 影响因子:
    0
  • 作者:
    Zhenge Jia;Yiyu Shi;Jingtong Hu;Lei Yang;B. Nti
  • 通讯作者:
    B. Nti
Algorithm-hardware Co-design of Attention Mechanism on FPGA Devices
FPGA器件上注意力机制的算法-硬件协同设计
Learning to Learn Personalized Neural Network for Ventricular Arrhythmias Detection on Intracardiac EGMs
学习学习用于心内 EGM 室性心律失常检测的个性化神经网络
  • DOI:
    10.24963/ijcai.2021/359
  • 发表时间:
    2021
  • 期刊:
  • 影响因子:
    0
  • 作者:
    Zhenge Jia;Zhepeng Wang;Feng Hong;Lichuan Ping;Yiyu Shi;Jingtong Hu
  • 通讯作者:
    Jingtong Hu

Jingtong Hu的其他文献

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{{ truncateString('Jingtong Hu', 18)}}的其他基金

Collaborative Research: FuSe: R3AP: Retunable, Reconfigurable, Racetrack-Memory Acceleration Platform
合作研究:FuSe:R3AP:可重调、可重新配置、赛道内存加速平台
  • 批准号:
    2328972
  • 财政年份:
    2024
  • 资助金额:
    $ 32万
  • 项目类别:
    Continuing Grant
Collaborative Research: DESC: Type I: FLEX: Building Future-proof Learning-Enabled Cyber-Physical Systems with Cross-Layer Extensible and Adaptive Design
合作研究:DESC:类型 I:FLEX:通过跨层可扩展和自适应设计构建面向未来的、支持学习的网络物理系统
  • 批准号:
    2324937
  • 财政年份:
    2024
  • 资助金额:
    $ 32万
  • 项目类别:
    Standard Grant
Collaborative Research: CNS Core: Small: Towards Unsupervised Learning on Resource Constrained Edge Devices with Novel Statistical Contrastive Learning Scheme
合作研究:CNS 核心:小型:利用新颖的统计对比学习方案在资源受限的边缘设备上实现无监督学习
  • 批准号:
    2122320
  • 财政年份:
    2021
  • 资助金额:
    $ 32万
  • 项目类别:
    Standard Grant
Collaborative Research:CNS Core: Small: Intermittent and Incremental Inference with Statistical Neural Network for Energy-Harvesting Powered Devices
合作研究:CNS 核心:小型:利用统计神经网络对能量收集供电设备进行间歇和增量推理
  • 批准号:
    2007274
  • 财政年份:
    2020
  • 资助金额:
    $ 32万
  • 项目类别:
    Standard Grant
RAPID:Collaborative:Independent Component Analysis Inspired Statistical Neural Networks for 3D CT Scan Based Edge Screening of COVID-19
RAPID:协作:独立成分分析启发的统计神经网络,用于基于 3D CT 扫描的 COVID-19 边缘筛查
  • 批准号:
    2027546
  • 财政年份:
    2020
  • 资助金额:
    $ 32万
  • 项目类别:
    Standard Grant
IRES Track I: International Research Experience for Students on Non-Volatile Processor Based Self-Powered Embedded Systems
IRES Track I:基于非易失性处理器的自供电嵌入式系统学生的国际研究经验
  • 批准号:
    1827009
  • 财政年份:
    2018
  • 资助金额:
    $ 32万
  • 项目类别:
    Standard Grant
SHF: Small: Collaborative Research: Multi-level Non-volatile FPGA Synthesis to Empower Efficient Self-adaptive System Implementations
SHF:小型:协作研究:多级非易失性 FPGA 综合,实现高效自适应系统
  • 批准号:
    1820537
  • 财政年份:
    2017
  • 资助金额:
    $ 32万
  • 项目类别:
    Standard Grant
CRII: CSR: Enabling Efficient Non-Volatile Processors on Energy Harvesting Powered Embedded Systems
CRII:CSR:在能量收集供电的嵌入式系统上启用高效的非易失性处理器
  • 批准号:
    1830891
  • 财政年份:
    2017
  • 资助金额:
    $ 32万
  • 项目类别:
    Standard Grant
SHF: Small: Collaborative Research: Multi-level Non-volatile FPGA Synthesis to Empower Efficient Self-adaptive System Implementations
SHF:小型:协作研究:多级非易失性 FPGA 综合,实现高效自适应系统
  • 批准号:
    1527506
  • 财政年份:
    2015
  • 资助金额:
    $ 32万
  • 项目类别:
    Standard Grant
CRII: CSR: Enabling Efficient Non-Volatile Processors on Energy Harvesting Powered Embedded Systems
CRII:CSR:在能量收集供电的嵌入式系统上启用高效的非易失性处理器
  • 批准号:
    1464429
  • 财政年份:
    2015
  • 资助金额:
    $ 32万
  • 项目类别:
    Standard Grant

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