SHF: SMALL: End-to-End Global Routing with Reinforcement Learning in VLSI Systems

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Integrated circuits have transformed every sector of modern life with a broad range of computing devices – from personal computers to specialized accelerators and high-performance computing clusters. With the ever-high design complexity of modern integrated systems, traditional electronic design-automation algorithms cannot guarantee convergence of the design process, fail to predict output quality, and often settle for lower performance. Considering billions of dollars spent on developing a system in a new technology node, the loss of profit due to not having the system ready on time for release to market or losing the performance benefits of the new technology node cannot be mitigated. This project investigates a fundamentally new approach for circuit global routing -- a critical automated design step and a primary bottleneck in the design process. The primary objective is to route circuits with deep-learning models in a highly parallelizable manner, shortening the turnaround design time by orders of magnitude. More broadly, the results from this project are expected to shift existing physical-design paradigms toward a learning-driven predictable process that can exploit the advantages of the underlying technology to their full potential in a timely manner. Executed by a federally designated Hispanic Serving Institution, this award presents a unique opportunity to engage with a diverse minority population and creates training opportunities in circuit design, electronic design automation, and machine learning. As such, the project is anticipated to have a strong economic and societal impact.Designed via a pile of intractable optimizations to tackle the NP-hard problem of global routing, traditional routers are characterized by convergence issues and unpredictable routing quality. While there is a general agreement on potential benefits of realizing routing with machine-learning (ML) models, not a single end-to-end learning framework has been demonstrated to route unseen high-resolution practical integrated circuits.To address this challenge, global routing will be investigated as an ML problem in which nets are viewed as the missing parts of a routing solution and reconstructed, in a preferred order, with imaging ML models while considering the overall minimum wirelength objective and congestion constraints. The insights from this study will be exploited to develop a reinforcement-learning framework comprising: (i) graph neural network for encoding routing attributes, (ii) net ordering policy for determining the next net to be routed, and (iii) variational autoencoder to route individual unseen nets. The resulting design methodology and ML models, architectures, and algorithms will be integrated in an end-to-end ML router and demonstrated on existing benchmarks and commercial products provided by industrial collaborators.This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.