SBIR Phase II: A Software Platform for Assessment of Untrusted Electronics
SBIR 第二阶段:用于评估不可信电子产品的软件平台
基本信息
- 批准号:2304533
- 负责人:
- 金额:$ 90.78万
- 依托单位:
- 依托单位国家:美国
- 项目类别:Standard Grant
- 财政年份:2023
- 资助国家:美国
- 起止时间:2023-09-01 至 2025-08-31
- 项目状态:未结题
- 来源:
- 关键词:
项目摘要
The broader/commercial impact of this Small Business Innovation Research (SBIR) Phase II project is to address hardware security and trust issues that are threatening the semiconductor supply chain. Various threats exist from the design stage till the end of the life of chips, such as malicious logic insertion, intellectual property (IP) theft, reverse engineering, backdoor insertion, and information leakage from fabricated chips. Ensuring the security of the supply chain necessitates enhancing chip integrity through proactive measures starting from the design stage to distribution. With security concerns increasingly gaining prominence in specific market segments, such as automotive, defense, and healthcare, various stakeholders, such as device manufacturers, system integrators, end users, and governments are voicing the need for a trusted semiconductor supply chain. Using the proposed software platform, stakeholders of the chip industry will be able to address security challenges at a low cost, without needing trained experts. Furthermore, the team's tools will contribute to minimizing electronic waste generated from refabricating flawed chips and developing software patches that reduce the performance of insecure systems. The proposed technologies will drive chip designers to prioritize enhancing chip security, ensuring competitiveness in environments where secure systems are essential.This Small Business Innovation Research (SBIR) Phase II project seeks to address the challenge of commercial deployment of hardware security software to detect, assess, and mitigate hardware security vulnerabilities in system-on-chip (SoC) designs. By utilizing a novel methodology, the tool converts Common Weakness Enumerations (CWEs) into a formal description of security properties, which the platform's remaining tools can interpret to identify commonly occurring errors and vulnerabilities in hardware designs. The software seamlessly integrates with major commercial electronic design automation (EDA) tool flow, enhancing the deployment of hardware security software. The toolsets detect security issues in SoCs, including access control violations, asset leakage, and malicious logic or backdoors. The software considers security concerns in the global electronic supply chain involving untrusted entities. The team will collaborate with industry leaders to ensure widespread accessibility. Partnerships with several design companies will demonstrate the unique capabilities of the tool to analyze large designs, e.g., RISC-V processors, and detect a wide array of security vulnerabilities. The utilization of the product will significantly enhance the technology readiness level (TRL) and drive widespread adoption.This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.
小型企业创新研究(SBIR)第二阶段项目的更广泛的商业影响是解决威胁半导体供应链的硬件安全和信任问题。从芯片的设计阶段到生命周期结束,存在着各种威胁,如恶意逻辑插入、知识产权盗窃、逆向工程、后门插入和制造芯片的信息泄漏。为了确保供应链的安全,必须通过从设计阶段到分销阶段的主动措施来增强芯片的完整性。随着安全担忧在汽车、国防和医疗保健等特定细分市场日益突出,各种利益相关者,如设备制造商、系统集成商、最终用户和政府,都表示需要可信的半导体供应链。使用拟议的软件平台,芯片行业的利益相关者将能够以低成本应对安全挑战,而不需要训练有素的专家。此外,该团队的工具将有助于最大限度地减少因重新填充有缺陷的芯片和开发降低不安全系统性能的软件补丁而产生的电子垃圾。建议的技术将促使芯片设计者优先提高芯片安全性,确保在安全系统必不可少的环境中的竞争力。该小型企业创新研究(SBIR)第二阶段项目旨在解决硬件安全软件商业部署的挑战,以检测、评估和缓解片上系统(SoC)设计中的硬件安全漏洞。通过利用一种新的方法,该工具将常见弱点枚举(CWE)转换为安全属性的正式描述,平台的其余工具可以解释该描述,以识别硬件设计中常见的错误和漏洞。该软件与主要商业电子设计自动化(EDA)工具流程无缝集成,增强了硬件安全软件的部署。这些工具集检测SoC中的安全问题,包括访问控制违规、资产泄漏和恶意逻辑或后门。该软件考虑了涉及不可信实体的全球电子供应链中的安全问题。该团队将与行业领导者合作,确保广泛的可及性。与几家设计公司的合作将展示该工具在分析大型设计(例如RISC-V处理器)和检测广泛的安全漏洞方面的独特能力。该产品的使用将显著提高技术准备水平(TRL)并推动广泛采用。该奖项反映了NSF的法定使命,并已通过使用基金会的智力优势和更广泛的影响审查标准进行评估,被认为值得支持。
项目成果
期刊论文数量(1)
专著数量(0)
科研奖励数量(0)
会议论文数量(0)
专利数量(0)
LLM4SecHW: Leveraging Domain-Specific Large Language Model for Hardware Debugging
- DOI:10.1109/asianhost59942.2023.10409307
- 发表时间:2023-12
- 期刊:
- 影响因子:0
- 作者:Weimin Fu;Kaichen Yang;R. Dutta;Xiaolong Guo;Gang Qu
- 通讯作者:Weimin Fu;Kaichen Yang;R. Dutta;Xiaolong Guo;Gang Qu
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Raj Gautam Dutta其他文献
Raj Gautam Dutta的其他文献
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- 批准号:
2036234 - 财政年份:2021
- 资助金额:
$ 90.78万 - 项目类别:
Standard Grant
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