SBIR Phase II: Low-Cost Packaging Solution for Space-Grade and High-Reliability Integrated Circuits

SBIR 第二阶段：航天级高可靠性集成电路的低成本封装解决方案

• 批准号: 2304975
• 负责人: Abhijeet Ghoshal
• 金额: $ 99.96万
• 依托单位: APOGEE SEMICONDUCTOR, INC.
• 依托单位国家: 美国
• 项目类别: Cooperative Agreement
• 财政年份: 2023
• 资助国家: 美国
• 起止时间: 2023-12-01 至 2025-11-30
• 项目状态: 未结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=2304975&HistoricalAwards=false
• 关键词: SBIR; Phase; II; Low; Cost

This Small Business Innovation Research (SBIR) Phase II project enables the use of modern packaging technologies for integrated circuits in space applications. While failures in satellites are common and high insurance claims due to such failures are frequent, the space industry continues to use integrated circuits (ICs) that are either unreliable (non-space-grade) and are prone to failure, or space-grade ICs with large and costly packaging and compromised performance. This innovation offers a cost-effective and reduced-size solution for the packaging of ICs that can operate reliably over the extreme temperature cycles experienced in space applications. Wafer Level Chip Scale Packaging (WLCSP) is lighter, smaller, and has superior electrical and thermal performance when compared to traditional leaded packaging solutions. These attributes make it desirable to the space industry by reducing size and weight, while not compromising performance. As this packaging technology is limited due to its performance under temperature cycling, this project seeks to address this reliability problem by using existing manufacturing techniques coupled with a novel design concept. This Small Business Innovation Research (SBIR) Phase II project aims to redesign specific layers within the existing Wafer Level Chip Scale Packaging (WLCSP) to improve reliability under temperature cycling. The temperature cycle reliability problem in the WLCSP is caused by a thermal expansion rate mismatch of silicon die and the copper circuit board. This project will redesign the redistribution layer within the WLCSP to compensate for this mismatch by effectively moving the interconnects on the silicon die in accordance with the faster moving printed circuit board (PCB). This project will make the benefits of WLCSP accessible for the entire space community.This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.

这个小型企业创新研究（SBIR）第二阶段项目使现代封装技术在空间应用中的集成电路的使用成为可能。虽然卫星故障很常见，并且由于这种故障而导致的高额保险索赔也很常见，但航天工业继续使用不可靠（非空间级）且易于发生故障的集成电路（IC），或者具有大型和昂贵封装且性能受损的空间级IC。这一创新为IC封装提供了一种具有成本效益且尺寸更小的解决方案，可以在太空应用中经历的极端温度循环下可靠地运行。与传统的引线封装解决方案相比，晶圆级芯片规模封装（WLCSP）更轻、更小，并且具有上级电气和热性能。这些属性使其通过减小尺寸和重量而不损害性能而受到航天工业的欢迎。由于这种封装技术是有限的，由于其在温度循环下的性能，该项目旨在通过使用现有的制造技术加上一个新的设计概念，以解决这个可靠性问题。该小型企业创新研究（SBIR）第二阶段项目旨在重新设计现有晶圆级芯片规模封装（WLCSP）中的特定层，以提高温度循环下的可靠性。WLCSP中的温度循环可靠性问题是由硅芯片和铜电路板的热膨胀率不匹配引起的。该项目将重新设计WLCSP内的重分布层，以根据快速移动的印刷电路板（PCB）有效地移动硅芯片上的互连，从而补偿这种失配。该奖项反映了NSF的法定使命，并通过使用基金会的知识价值和更广泛的影响审查标准进行评估，被认为值得支持。