Fast and Accurate Design Methodologies using Fully Event-Driven Simulations for non-ideal Mixed-Signal Systems

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Nowadays wireless communication is becoming more important and need the implementation of power efficient and high density ICs. Hence, mixed-signal systems like DC-DC converters or phase-locked loops (PLL) are increasingly integrated.These systems mix analogue and digital parts and exhibit a nonlinear pulse-width modulated (PWM) switching behaviour. Thus their design cannot rely on general feed-back theories and simulations at transistor or behavioural levels are often used. Transistor-level (TL) models are very accurate, whereas behavioural models allow an easier handling of parasitic effects. The main bottlenecks of these approaches are the long processing times, the huge computational consumption and the overall design costs. Thus a quick insight into the system behaviour is made difficult endangering the guaranty of a robust design. In addition, at TL all non-ideal effects are considered at once, making the analysis of their singular and combined influences on the performances even more complex.To get a quick overview of the system properties, design methods based on linear models are used. Because of the early linearization, nonlinear and non-ideal effects are not considered. However, it is crucial to take them into account for a robust design, since they affect the stability, frequency purity and transient dynamic behaviour. Additionally, the validity of these modelling approaches is limited to the domain close to the operation point, discarding them for transient pull-in predictions which are essential when considering frequency synthesis.To combine the accuracy of TL simulations and the efficiency of linear models, a mixed-signal system can be represented by an event-driven (ED) modelling approach. Based on the example of a charge pump (CP) PLL, an ED model considering the major non-ideal effects is introduced here. This model evaluates only the triggering edges of the PWM procedure, reducing drastically the simulation time and the amount of produced data. Speed-up factors up to 100000 are expected with a very good accuracy compared to TL simulations.In this project, to overcome the design challenges of mixed-signal systems, i.e. switching behaviour, non-ideal and nonlinear behaviour, the efficient ED model will be advanced to cover the CP-PLL, clock and data recovery PLL and Delay-Locked Loop applications. All major parasitic and nonlinear effects will be extracted at TL and modelled within the ED representation. In addition, an interface between the ED model and Cadence will be implemented in order to realise a practical parameter extraction. Once the ED model is enriched by these parasitic effects, their influence on the loop performances will be systematically explored, leading to an exhaustive and more robust design methodology of mixed-signal PLLs and DLLs. To show the feasibility of this modelling and design methodology, the gathered knowledge will be extrapolated to other mixed-signal systems like the DC-DC converter.