Research and development of a pixel detector for a beam profile monitor for a linear collider

本项目的目标是开发一种硅像素探测器，用于测量日本和美国提出的室温直线对撞机的光束轮廓。首先，通过仿真证明了原理。与夏威夷大学的舍伍德帕克合作设计并生产了一种原型传感器。读出芯片由该小组设计并由ROHM通过VDEC制造。该传感器的时间分辨率达到了30ns，使用东北大学工学部的Co60光源，验证了其耐辐射能力达到了2Mrad。下一步是制作可与传感器凸点接合的读出芯片。2004年8月，国际技术建议小组（ITRP）决定国际直线对撞机采用超导技术，因为基于超导技术的直线对撞机的每束流命中数是基于室温技术的20倍。 关于我们 温度技术，原电路设计会导致阶数单位的占用。这导致我们采用一种方案，其中将长射束串分成20个时间片，并且在射束串的差距期间读出计数。该设计于2005年完成，并提交给VDEC生产原型。原型于2005年底制造并交付给东北大学。2005年8月在美国科罗拉多斯诺马斯举行的国际直线对撞机讲习班上介绍了这一现状报告。测试系统是与芯片生产同时开发的，测试揭示了输入多晶硅电阻器的一个问题。经过X射线分析、电子束分析、聚焦离子束等测试，解决了部分输入电阻的问题，部分功能得到验证。经过与公司的讨论，很明显，问题的原因是由代工厂（台积电）认证的程序中的一个错误，以检查设计规则。经过必要的修改后，我们重新提交了读出芯片。该芯片的设计和制作已在“国际直线对撞机对监测器像素化读出电路”一文中作了介绍。在这些研究的同时，进行了模拟研究，看看是否可以测量的情况下，一个大的光束交叉角的光束轮廓。该研究发现，即使与正面碰撞情况相比精度降低，测量也是可能的，并且结果已作为论文发表。少

The goal of this project is to develop a silicon pixel detector for measuring the beam profile of a room-temperature linear collider that was proposed by Japan and the United States. First, the proof of principle was demonstrated by simulation. A prototype sensor was designed and produced in collaboration with Sherwood Parker of University of Hawaii. The readout chip was designed by this group and fabricated by ROHM through VDEC. The timing resolution achieved 30ns, and the radiation tolerance was proved up to 2 Mrad using the Co60 source at the engineering department of Tohoku University.The next step was to produce a readout chip that can be bump bonded to the sensor. In August 2004, however, ITRP (International Technology Recommendation Panel) has decided that the International Linear Collider be based on the super-conducting technology Since the hit count per beam train for the linear collider based on the super-conducting technology is 20 times larger than that based on the room-t … More emperature technology, the original circuit design would result in occupancy of order unity. This led us to adopt a scheme where the long beam train is divided to 20 time slices and the counts are read out during the gap of the beam train. The design was completed in 2005 and submitted to VDEC for production of a prototype. The prototype was fabricated and delivered to Tohoku University at the end of 2005. The status report was presented at the International Linear Collider Workshop at Snowmass, Colorado, USA in August 2005. The test system had been developed in parallel with the chip production, and the test revealed a problem at the input polysilicon resister. After extensive tests involving X-ray analysis, Electron Beam Analysis, and Focused Ion Beam, the problem at a few of the input resisters were fixed and a part of functions have been verified. After discussions with companies, it became clear that the reason for the problem was a bug in the program certified by the foundry (TSMC) to check the design rule. We have re-submitted the read out chip after necessary modifications. The design and fabrication of the chip are described in the paper 'Pixelated readout circuit for pair monitor at international linear collider'. In parallel with these studies, a simulation study was performed to see if the beam profile can be measured for the case of a large beam crossing angle. The study found that the measurement is possible even though the accuracy degrades compared to the head-on collision case, and the result has been published as a paper. Less