Vertical Integration of VLSI mobile processor for Wearable Perception Device

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The design technology of ultra-low power VLSI processor to improve the perception recognition ability of the next generation wearable computer has been developed. A SIFT Descriptor Generation Engine which features a VLSI oriented Scale Invariant Feature Transform (SIFT) algorithm was realized and it provides high energy efficiency, 2.79mJ/frame, and processing capability for HDTV resolution video (1920x1080 pixels) at 30 frames per second (fps). Moreover, the development of VLSI architecture for the real-time continuous speech recognition was completed about 20000 vocabularies.