Development of interface nano-fabrication technique by STM tip for quantum-wave interference devices

我们一直在开发STM和基于STM的各种表面科学技术，以研究晶体表面的电学性质。研究范围从原子尺度的表面结构测定到电子性质，如表面电子态、电输运性质、电容和功函数。物理学的范围从纳米尺度到原子尺度，揭示了晶体表面发生的各种丰富现象。在目前的项目中，我们已经扩展了我们的研究，在薄膜基板系统的界面纳米尺度的制造。利用聚焦隧穿电子束，通过控制Si（111）衬底上Au纳米颗粒膜之间的界面传输几率，成功地制备了纳米存储器。每个存储器件的尺寸约为10 nm，这受到膜中每个晶粒尺寸的限制，并且可以缩小尺寸以具有更高的存储器件密度和更高的存储器件容量。所得结果对纳米级存储器件的开发具有一定的指导意义。

We have been developing STM and various surface science techniques based on STM for electrical properties on crystal surfaces. The studies range from atomic scale surface structure determination to electronic properties such as surface electronic state, electrical transport properties, capacitance, and work functions. The physics range from nanometer-scale to atomic scale and have reveled a diversity of rich phenomena that takes place on the crystal surfaces. In the present project, we have extended our studies to a nano-scale fabrication at the interfaces of thinfilm-substrate systems. By use of focused tunneling electron beam, we have succeeded to fabricate a nano-sized memory by controlling the interface transmission probability at the interface between Au nano-granular film on Si(111). The size of each memory device was around 10nm which is limited by the size of each grains in the film and can be downsized to have higher density and higher capacity of the memory device. The results obtained here will be useful for developing novel memory devises in nanometer scale.