COBRA: CMOS Oscillator Based Rapid Annealing Computing

使用经典计算机解决某些计算问题是非常困难的，例如，在调度、金融、交通路线、机器学习等学科中发现的组合优化问题。虽然经典计算机的性能在不断提高，但此类问题的复杂性不允许此类计算机在可行的时间内找到准确或最优解。因此，替代的计算方法正在被广泛研究。在经典von Neumann计算机以及专用硬件平台和量子计算机上实现的一种常见方法是将组合问题映射到伊辛模型，并使用退火法搜索(接近)最优解。这种退火法概念(源自冶金学)允许变量的状态以可控的方式随机改变，以解决优化问题，优化问题通常被定义为需要最小化的能量函数(伊辛哈密顿量)。量子计算机有可能利用量子力学以极快的速度找到伊辛哈密顿的基态，但仍然需要克服有效的纠错和冷却到绝对零度附近的巨大障碍。作为短期内的替代方案，基于CMOS技术的退火计算机正在出现。富士通和日立目前可用的系统是基于数字CMOS硬件的，被称为数字退火机。与量子计算机相比，数字退火炉并行执行试验的能力有限，因此需要更多时间来找到伊辛哈密顿量的基态。最近，在基于振荡器的伊辛机(OIM)的名称下，提出了一种基于经典CMOS硬件的更快的计算机退火法。OIM使用耦合振荡器来实现伊辛模型，而不是数字门，并且在几个振荡周期内提供非常快的收敛。到目前为止，只提出了使用分立组件的具有多达240个节点的小规模原型，但已经显示了这种方法的潜力。然而，集成实现需要克服严峻的挑战，使该技术适合于芯片集成。这项工作旨在为基于全集成振荡器的CMOS退火机提供一个概念验证。由于振荡器和它们的耦合是模拟元件，不可避免的非理想性对退火过程的影响是主要关注的。尤其是为了扩展到更大的节点数，必须很好地理解节点之间的相互作用，并且需要健壮的振荡器和耦合电路。该项目的第二个目的是扩展可以通过利用耦合振子的性质来解决的问题空间，以实现比伊辛模型更高阶的模型，每个节点具有两个以上的可能状态。

Certain computational problems are extraordinarily hard to solve using classical computers, e.g. combinatorial optimization problems found in disciplines like scheduling, finance, traffic routing, machine learning and others. Although the performance of classical computers is constantly being improved the complexity of such problems does not allow such computers to find the exact or optimal solution in a feasible amount of time. Therefore, alternative computing methods are being intensively researched. A common approach that is used in implementations on classical von Neumann computers as well as in specialized hardware platforms and quantum computers is to map the combinatorial problem to the Ising model and search for a (near to) optimal solution using the annealing method. This annealing concept (adapted from metallurgy) allows states of variables to change randomly in a controlled way in order to solve an optimization problem, which is usually defined as an energy function which needs to be minimized (the Ising Hamiltonian). Quantum computers have the potential to find the ground state of the Ising Hamiltonian extremely fast by exploiting quantum mechanics, but still need to overcome huge hurdles like efficient error correction and the cooling to temperatures near absolute zero.As an alternative in the short term annealing computers based on CMOS technology are emerging. Currently available systems by Fujitsu and Hitachi are based on digital CMOS hardware and are referred to as digital annealers. Compared to quantum computers the digital annealers have only a limited capability to execute trials in parallel and therefore take more time to find the ground state of an Ising Hamiltonian. A promising approach for faster annealing computers using classical CMOS hardware has been recently proposed under the name Oscillator based Ising Machines (OIM). OIMs use coupled oscillators to implement the Ising model instead of digital gates and provide very fast convergence within a few oscillation cycles. So far, only small scale prototypes with up to 240 nodes using discrete components have been presented, but already show the potential of this approach. However, integrated implementations need to overcome serious challenges to make the technology suitable for chip integration. This work aims to provide a proof-of-concept for a fully integrated oscillator based CMOS annealing computer. Since the oscillators and their couplings are analog components, the influence of unavoidable non-idealities on the annealing process is of major interest. Especially for scaling towards large node numbers, the interaction between nodes must be well understood and robust oscillators and coupler circuits are needed. A second intention of the project is to extend the problem space that can be solved by exploiting the properties of coupled oscillators to also implement higher order models than the Ising model with more than two possible states per node.