COBRA: CMOS Oscillator Based Rapid Annealing Computing

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Certain computational problems are extraordinarily hard to solve using classical computers, e.g. combinatorial optimization problems found in disciplines like scheduling, finance, traffic routing, machine learning and others. Although the performance of classical computers is constantly being improved the complexity of such problems does not allow such computers to find the exact or optimal solution in a feasible amount of time. Therefore, alternative computing methods are being intensively researched. A common approach that is used in implementations on classical von Neumann computers as well as in specialized hardware platforms and quantum computers is to map the combinatorial problem to the Ising model and search for a (near to) optimal solution using the annealing method. This annealing concept (adapted from metallurgy) allows states of variables to change randomly in a controlled way in order to solve an optimization problem, which is usually defined as an energy function which needs to be minimized (the Ising Hamiltonian). Quantum computers have the potential to find the ground state of the Ising Hamiltonian extremely fast by exploiting quantum mechanics, but still need to overcome huge hurdles like efficient error correction and the cooling to temperatures near absolute zero.As an alternative in the short term annealing computers based on CMOS technology are emerging. Currently available systems by Fujitsu and Hitachi are based on digital CMOS hardware and are referred to as digital annealers. Compared to quantum computers the digital annealers have only a limited capability to execute trials in parallel and therefore take more time to find the ground state of an Ising Hamiltonian. A promising approach for faster annealing computers using classical CMOS hardware has been recently proposed under the name Oscillator based Ising Machines (OIM). OIMs use coupled oscillators to implement the Ising model instead of digital gates and provide very fast convergence within a few oscillation cycles. So far, only small scale prototypes with up to 240 nodes using discrete components have been presented, but already show the potential of this approach. However, integrated implementations need to overcome serious challenges to make the technology suitable for chip integration. This work aims to provide a proof-of-concept for a fully integrated oscillator based CMOS annealing computer. Since the oscillators and their couplings are analog components, the influence of unavoidable non-idealities on the annealing process is of major interest. Especially for scaling towards large node numbers, the interaction between nodes must be well understood and robust oscillators and coupler circuits are needed. A second intention of the project is to extend the problem space that can be solved by exploiting the properties of coupled oscillators to also implement higher order models than the Ising model with more than two possible states per node.