A novel high-speed and low power ADC based on a tracking ADC suitable for the implementation in general ultradeepsubmicron technologies
一种基于跟踪 ADC 的新型高速低功耗 ADC,适合在一般超深亚微米技术中实现
基本信息
- 批准号:401080686
- 负责人:
- 金额:--
- 依托单位:
- 依托单位国家:德国
- 项目类别:Research Grants
- 财政年份:2018
- 资助国家:德国
- 起止时间:2017-12-31 至 2021-12-31
- 项目状态:已结题
- 来源:
- 关键词:
项目摘要
A/D-Converter translate analogue electrical signals in digital information and are therefore an indispensable component for any communication system. Tracking-ADCs use comparably few analog components and are therefore quite suitable for the implementation in modern short-channel technologies, but suffer from limited Sample-Rates. With this project proposal we would like to investigate a new ADC-concept which is after first thoughts superior (regarding Sample-Rate, resolution and power consumption) to existing SAR or tracking-ADCs, but is avoiding at the same time the known limitations of sigma-delta-ADCs, and is still due to the almost exclusive implementation in digital logic economically suitable for the implementation in modern, state-of-the art technologies. With this project proposal the until now not challenged assumption for tracking-ADCs should be discontinued that the comparator immediately after detecting the input signal exceeding its comparative signal is inverting the counting direction of the digital counter. We would like to scientifically investigate and show that with the elimination of this fundamental assumption the technical properties of this modified tracking-ADCs (especially the maximum trackable slope, maximum input signal frequency as well as the resolution) likely improve significantly. After first thoughts, the existing design challenges on system and component level are modified: especially the comparator properties offset and high linearity also for large input signals now become top priorities, whereas the propagation delay steps back in importance. Further scientific investigations are now the optimal system properties of the digital signal processing network as well as the symmetry of the analog feedback signal. In the frame of this project system and component properties should be analysed, and ideally the fundamental concept is verified by fabrication and measurement of ideally two ASIC-implementations on a smaller than 28nm channel length / feature size technology.
A/D转换器将模拟电信号转换为数字信息,因此是任何通信系统不可或缺的组件。跟踪ADC使用非常少的模拟元件,因此非常适合在现代短通道技术中实现,但受到有限的采样率的影响。通过本项目提案,我们希望研究一种新的ADC概念,该概念在初步考虑后上级现有的SAR或跟踪ADC(在采样率、分辨率和功耗方面),但同时避免了Σ-Δ ADC的已知局限性,并且仍然是由于数字逻辑中几乎唯一的实施方式,经济上适合现代最先进技术的实施。在本项目提案中,迄今为止未受到质疑的跟踪ADC假设应该停止,即比较器在检测到输入信号超过其比较信号后立即反转数字计数器的计数方向。我们希望通过科学研究证明,在消除这一基本假设后,这种改进型跟踪ADC的技术特性(特别是最大可跟踪斜率、最大输入信号频率以及分辨率)可能会显著改善。经过初步思考,系统和元件级的现有设计挑战得到了修改:特别是比较器特性偏移和高线性度(适用于大输入信号)现在成为最优先考虑的问题,而传播延迟的重要性则有所下降。进一步的科学研究现在是数字信号处理网络的最佳系统特性以及模拟反馈信号的对称性。在该项目的框架中,应分析系统和组件特性,理想情况下,通过在小于28 nm的通道长度/特征尺寸技术上制造和测量理想的两个ASIC实现来验证基本概念。
项目成果
期刊论文数量(1)
专著数量(0)
科研奖励数量(0)
会议论文数量(0)
专利数量(0)
A novel Approach for Extending the Bandwidth Limitation of Tracking-ADCs
一种扩展跟踪 ADC 带宽限制的新方法
- DOI:10.1109/mocast49295.2020.9200297
- 发表时间:2020
- 期刊:
- 影响因子:0
- 作者:Oliver Bachmann;Klaus Hofmann
- 通讯作者:Klaus Hofmann
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Professor Dr.-Ing. Klaus Hofmann其他文献
Professor Dr.-Ing. Klaus Hofmann的其他文献
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{{ truncateString('Professor Dr.-Ing. Klaus Hofmann', 18)}}的其他基金
Source-synchronous I/O links using Adaptive Interface Trainings for High Bandwidth Applications
使用适用于高带宽应用的自适应接口训练的源同步 I/O 链路
- 批准号:
269885131 - 财政年份:2015
- 资助金额:
-- - 项目类别:
Research Grants
COBRA: CMOS Oscillator Based Rapid Annealing Computing
COBRA:基于 CMOS 振荡器的快速退火计算
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496307198 - 财政年份:
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- 批准号:
466650813 - 财政年份:
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