Digital High-Linear Closed-Loop CMOS Transmitter with Highest Energy Efficiency for Future Mobile Radio Generations (DigiMOST)

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This application aims at the realization of a novel digital transmitter for energy-efficient handsets with high signal bandwidth, as required in future generations of mobile communications. The project proposes a purely digital transmitter concept that integrates the power amplifier into a feedback loop. The inevitable nonlinearities of the amplifier are thus corrected as they arise, eliminating the need for time-consuming characterization. The feedback loop enforces the linearity of the overall system from input to output. This also means that, contrary to previous transmitter solutions, no signal pre-distortion or DPD is required. The sometimes high computational effort for pre-distortion is eliminated. This opens up degrees of freedom for improving efficiency, which can be exploited with the aid of a flexible modulator. For the first time, this approach can simultaneously minimize linearity and energy efficiency for a digital transmitter. This will be demonstrated using a CMOS-based digital transmitter for handsets up to 6 GHz with 500 MHz signal bandwidth. The following two aspects in particular are new with this: 1. Inclusion of the digital RF power amplifier in the modulator feedback loop. This is not possible with analog amplifier concepts, but can be implemented in the intended project using purely digital technology with a digital power amplifier. It allows intrinsic linearization of even extremely nonlinear amplifiers or amplifiers without additional effort for constant parameter estimation or DPD.2. Thus, the amplifier can be designed for maximum energy efficiency, enabling new and power-saving circuit topologies. In addition, in contrast to all previous work, the combination of optimal modulator and closed-loop approach creates sufficient scope with regard to ACLR and EVM even for broadband signals of future mobile radio generations.In addition, the state of the art is extended in other respects as well:1. Investigation of the proposed modulation scheme for a digital PA for suitability for fixed-point arithmetic.2. Integration of all components of the transmit chain on a monolithic chip which, viewed as a black box, can replace analog transmit chains as drop-in replacement completely transparent with respect to the signal to be amplified.3. The use of a nanometer CMOS technology (e.g. 22nm FDX) with transit frequencies of 350-400GHz enables the realization of digital power amplifiers with 5/6G relevant carrier frequencies and signal bandwidths.