"Optimization of Switching Characteristics of High-Power Static Induction (SI) devices"

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Utilizing the device simulation code for high power switching semiconductor device developed by the authors, the switching characteristics of the static induction power devices are studied and their dependency on parameters of the devices is analyzed. Since the interests are focused on their ability in high power operation, the static induction thyristor (SI-Th) is taken up as the object analyzed.To improve the switching capabilities, especially local switching loss reduction, the structure and dimension of the device are varied. The two-directional shorting emitter, the profile near gate area and the effective width of the buried gate region are studied in relation with carrier flow, current concentration during switching-off and the profile of the voltage recovery. Their effects and suggestions to the improvement of the design are given from the simulation results.In order to relate such detailed analysis of the phenomenon in the device with the outer circuit construction too, the modeling scheme with SPICE is considered. The difference of the characteristics viewing from outside between SITh and buried gate GTO is not so introduced. The measured parameters required for the modeling with SPICE are made to be related with device parameters and compared with the experimental results. A practical way to obtain equivalent device parameter of SPICE from the device parameters such as life times, impurity concentration distribution and dimensions is shown. Thedirect measuring scheme is also studied.Further study is required on the optimal coordination between device structure and the snubber circuit configuration, especially in relation with the introduction of the active snubber. The scheme developed here is useful to evaluate the effectiveness of the specific circuit against the device with a special structure. The method to optimize automatically the circuit parameters for this purpose should be developed in future.