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Ultra High Speed Traffic Simulation by Super Computer

Ultra High Speed Traffic Simulation by Super Computer
超级计算机超高速交通模拟
批准号:
06452239
负责人:
TANAKA Yoshiaki
金额:
$4.74万
依托单位国家:
日本
项目类别:
Grant-in-Aid for Scientific Research (B)
财政年份:
1994
资助国家:
日本
项目状态:
已结题
起止时间:
1994 至 1996

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中文摘要
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英文摘要
Recently, many research, institutes have supercomputers, However, conventional traffic simulation methods cannot take advantage of vector processing capabilities of a supercomputer. A new simulation method fit for supercomputer is proposed. In this method, simulation parameters such as call originations and link states for a fixed time, are transformed into vectors and matrices. The performance using the vectorized simulation method for circuit, packet, and ATM switching networks is compared with that of the conventional method. The proposed simulation method gave similar loss probability and delay distribution. However, the CPU time of the proposed simulation method is significantly short.In these days, another type of supercomputer is becoming popular. Thatis parallel computer. A new traffic simulation method by using parallel computer is also studied. This method is applied to ATM network. ATM traffic has two levels, that is, call-level and cell-level. Call-level simulation, which means that we can see only whether connections are established or not, is comparatively easy. Besides this, cell-level simulation is also needed. We have to be able to see which cells have arrived and which have not. This is necessary to obtain the cell loss rate and the delay distribution. In ATM network, so many cells are transmitted and received in a short time, that the simulation needs a lot of computation. Therefore, it is difficult to make cell-level simulation of a large size ATM network by using conventional computer.A high-speed ATM traffic simulator is developed, which works on a parallel computer with cell-level observation supported. Clustering of the nodes of the network is needed to assign tasks to parallel processors. It is optimized in order to minimize the communication time between processors. The CPU time has been considerably shortened, compared with a conventional main frame computer.
期刊论文(25)
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会议论文
Y.Tanaka and T.Yasuda: "GPSS Translator for Supercomputer" IEICE Nat.Conv.B-847. (1995)
Y.Tanaka 和 T.Yasuda:“超级计算机的 GPSS 转换器”IEICE Nat.Conv.B-847。
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通讯作者:
田中良明,友近剛史: "ス-パコンピュータによるトラヒックシミュレーション(その2)" 電子情報通信学会技術研究報告. SSE94-35. 73-78 (1994)
Yoshiaki Tanaka、Takeshi Tomochika:“使用超级计算机进行交通模拟(第 2 部分)”IEICE 技术研究报告 SSE94-35(1994)。
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通讯作者:
田中良明,清水修,友近剛史: "ATMトラヒックのベクトル化シミュレーション" 電子情報通信学会論文誌. J80-B-II,1. 137-139 (1997)
Yoshiaki Tanaka、Osamu Shimizu、Takeshi Tomochika:“ATM 流量的矢量化模拟”,电子、信息和通信工程师学会汇刊 J80-B-II,1. 137-139 (1997)。
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通讯作者:
N.Ishikawa,Y.Tanaka,and T.Hamada: "ATM Traffic Simulation Using Parallel Computer" Asia-Paciffic Symposium on Information and Telecommunication Technologies. (1997)
N.Ishikawa、Y.Tanaka 和 T.Hamada:“使用并行计算机的 ATM 交通模拟”亚太信息和电信技术研讨会。
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通讯作者:
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