Study for Optoelectronic Integrated Circuits with Light Emitting Devices by Epitaxial Lift-off Technique

当使用金属互连实现非常高速的信号传输速度时，大规模集成电路（LSI）中的金属线的尺寸将变得非常大。为了克服速度和尺寸问题，光互连被认为是有前途的。在本研究中，我们开发了一些实现光互连LSI芯片的技术，例如GaAs发光二极管的安装技术。 (LED) 到 Si 芯片上。以前采用机械抛光来减薄 GaAs LED，但不太实用。在这项研究中，我们采用了一种名为“外延剥离（ELO）法”的新技术，从基板上去除GaAs LED，其中LED是通过分子束外延生长的，在LED层和基板之间有一层薄薄的AlAs释放层，并且AlAs层在稀HF溶液中被选择性蚀刻。我们改进了该方法，通过在蚀刻溶液中添加表面活性剂和消泡剂，提高温度并施加高压（5 kgf/cm），建立了非常高速（约高速度18倍）的ELO方法。此外，还开发了Si芯片上的GaAs安装技术，并确认了安装的GaAs LED不会劣化。此外，我们还开发了光栅耦合器的设计和制造方法、无裂纹光波导的制造技术、分支波导的设计和制造方法等。最后设计并制作了称为“光互连Kohonen网络”的模式匹配LSI。确认了所制作的测试芯片的基本操作。

The size of metal wires in the Large Scale Integrated Circuits (LSIs) will become very large when very high-speed signal transfer speed is realized by using the metal interconnects. In order to overcome this problem of speed and size, the optical interconnection is thought promising. In this research we have developed a few technologies to realize the optically interconnected LSI chips, such as the mounting technologies of GaAs light emitting diode. (LED) onto Si chips.Previously the mechanical polishing had been used for thinning the GaAs LEDs, which is less practical. In this study we have employed a new technology called "Epitaxial Lift-Off (ELO) Method" to remove the GaAs LEDs from the substrate, in which the LEDs are grown by molecular beam epitaxy with a thin AlAs release layer between the LED layer and the substrate, and the AlAs layer is selectively etched in a dilute HF solution. We have improved the method and very high speed (〜18 times higher speed) ELO method was established by adding the surfactant and antifoaming agent into the etching solution, raising the temperature and applying high pressure (5 kgf/cmィイD12ィエD1). Also the GaAs mounting technology onto the Si chips was developed and we have confirmed that the mounted GaAs LEDs are not deteriorated.Furthermore, we have developed such as design and fabrication method for grating couplers, fabrication technologies for optical waveguides with no crack, and design and fabrication method for branched waveguides. Finally the pattern matching LSI called "optically interconnected Kohonen net" was designed and fabricated. The basic operation of the fabricated test chip was confirmed.