Study on fabrication method for ultra-small transistors by means of selective atomic-layer deposition

本研究的目的是开发一种新的方法来制造超小型晶体管，这是传统的光刻方法所无法做到的，即通过硅的选择性原子层沉积。在由不同材料组成的堆叠层状结构的边缘，如果硅只在特定材料上选择性沉积，则MOS晶体管的栅极长度可以由沉积膜的厚度来控制。在本研究中，开发了这种方法。所得结果的摘要列于下面1。开发了氮化硅的选择性原子层沉积方法，为本研究奠定了基础。采用Si_2H_6气体间歇暴露的方法，将硅膜沉积在氮化硅上，少量沉积在SiO_2上。采用上述方法可制得宽21 nm、厚28 nm的极细硅丝，其电阻率仅为传统光刻法和干蚀刻法的1/5左右。采用Si_2H_6和SiCl_4交替供应的方法制备了表面非常光滑的硅原子层沉积方法，其沉积速率为每一个沉积周期沉积两层单层。作为评价窄硅丝性能的初步研究，采用SiH_4低压化学气相沉积法制备了最小宽度为95 nm、最小厚度为7 nm的多晶（poly-）硅丝，然后采用电子束光刻和干刻蚀法制备了窄硅丝。并测量了电特性。在低温（5 ~ 80 K）条件下观察到库仑阻滞效应，并提出了窄多晶硅线中的电子传导机制。采用选择性原子层沉积法制备的硅窄线在低压区出现了可能由库仑阻塞效应引起的电流抑制现象。少

The purpose of this study is to develop a new method for fabrication of ultrasmall transistors, which is impossible by the conventional lithography method, by means of the selective atomic-layer deposition of silicon (Si). At the edge of the stacked layered structures consisting of different materials, if the selective deposition of Si occurs only on the specific material, the gate length of the MOS transistors can be controlled by the thickness of the deposited film. In this study, this method is developed. The summary of the obtained results is listed below.1. The selective atomic-layer deposition method of silicon nitride is developed, which is the basis of this study.2. The selective atomic-layer deposition method for Si is developed, in which the Si film is deposited only onto the silicon nitride and very small amount deposition on SiO_2, by means of the intermittent exposure of Si_2H_6 gas.3. By using the above method, very narrow Si wires (21 nm wide and 28 nm thick) is fabricat … More ed. The resistivity of the Si wires is about 1/5 compared with that fabricated by the conventional method using lithography and dry etching.4. Atomic-layer deposition method of Si with very smooth surface is developed by using the alternative supply of Si_2H_6 and SiCl_4, in which the deposition rate is two mono-layers per one deposition cycle.5. As the preliminary study for the evaluation of the narrow Si wires, the polycrystalline (poly-) Si wires (minimum width of 95 nm and minimum thickness of 7 nm) were fabricated by using the low-pressure chemical vapor deposition of SiH_4, followed by the electron-beam lithography and dry etching. And the electrical characteristics were measured. As the result the Coulomb blockade effect was observed at low temperatures (5〜80 K) and the electronic conduction mechanism in the narrow poly-Si wires were proposed.1. The current suppression phenomenon at the low-voltage region, which might be caused by the coulomb blockade effect, was observed for the Si narrow wires fabricated by the selective atomic-layer deposition. Less