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Hardware Description Language-Oriented Analog/Digilal Mixed-Signal Multilevel Circuit Simulator

Hardware Description Language-Oriented Analog/Digilal Mixed-Signal Multilevel Circuit Simulator
硬件描述面向语言的模拟/数字混合信号多级电路模拟器
批准号:
11650409
负责人:
ASAI Hideki
金额:
$2.37万
依托单位:
依托单位国家:
日本
项目类别:
Grant-in-Aid for Scientific Research (C)
财政年份:
1999
资助国家:
日本
项目状态:
已结题
起止时间:
1999 至 2001

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中文摘要
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英文摘要
Progress of integration and high-frequency techniques demands that circuit simulator has toI) deal with analog/digital mixed signals for analog/digital mixed LSLs,II) deal with the electromagnetic field effects for the verification of signal/power integrity,III) use the behavioral models for the verification of large-scale system.Therefore, we need the analog/digital mixed-mode multilevel circuit simulator, which can deal with behavioral model of the functional block From 1999 to 2000, in this research project, we have developed the multilevel simulator, which1) can use hardware description language ASSIST-alpha, which has been written in C/C++ language,2) includes the FDTD-based electromagnetic field solver,3) includes the synthesizer for macromodeling of 3-dimensional interconnectFurthermore, from 2000 to 2001, we have improved the above simulator by addition of4) acceleration techniques of 3-dimensional electromagnetic field solver based on FDTD method,5) macromodeling method from data obtained by 3-dimensional simulation,6) modeling and simulation techniques based on analog hardware description language, and developed the prototype of mixed-mode multilevel simulator which is applicable to verification of signal integrity.
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通讯作者:
浅井秀樹: "SoC/SiP設計に向けたEDAシステムの将来像"電気学会電子回路研究会資料. ECT-02-46. 29-34 (2002)
Hideki Asai:“SoC/SiP 设计的 EDA 系统的未来形象”IEEJ 电子电路研究组材料。 ​​ECT-02-46 (2002)。
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8
    Highly-parallel and high-performance CAE system based on revolutionary analysis method for high-speed signaling
    • 批准号:
      24300018
    • 项目类别:
      Grant-in-Aid for Scientific Research (B)
    • 资助金额:
      $11.65万
    • 财政年份:
      2012
    • 负责人:
      ASAI Hideki
    • 依托单位:
    Multi-Level Circuit Simulator Using Hardware Description Language
    • 批准号:
      08650461
    • 项目类别:
      Grant-in-Aid for Scientific Research (C)
    • 资助金额:
      $1.6万
    • 财政年份:
      1996
    • 负责人:
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    Time/Frequency Transform Domain Mixed Mode Circuit Simulation System
    • 批准号:
      06650441
    • 项目类别:
      Grant-in-Aid for General Scientific Research (C)
    • 资助金额:
      $0.9万
    • 财政年份:
      1994
    • 负责人:
      ASAI Hideki
    • 依托单位:
    国内基金
    海外基金
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    • 批准号:
      20972011
    • 项目类别:
      面上项目
    • 资助金额:
      35.0万元
    • 批准年份:
      2009
    • 负责人:
      刘俊义
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