Modeling of GaN-based Electron Devices
Modeling of GaN-based Electron Devices
批准号:
14550329
负责人:
HORIO Kazushi
金额:
$1.79万
依托单位国家:
日本
项目类别:
Grant-in-Aid for Scientific Research (C)
财政年份:
2002
资助国家:
日本
项目状态:
已结题
起止时间:
2002 至 2004
中文摘要
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英文摘要
Recently, GaN-based FETs have received great interest because of their potential applications to high power and high temperature microwave devices. However, slow current transients are often observed even if the drain voltage or the gate voltage is changed abruptly. This is called drain lag or gate lag, and is problematic in circuit applications. The slow transients mean that the dc I-V curves and the ac I-V curves become quite different, resulting in lower ac power available than that expected from the dc operation. This is called power slump or current collapse in the GaN-device field. These are regarded as trap-related, and there are many experimental works reported on these phenomena. But, few theoretical works have been reported for GaN-based FETsTherefore, in this work, two-dimensional transient simulations of GaN MESFETs have been performed in which a three level compensation model is adopted for the semi-insulating buffer layer where a shallow donor a deep donor, and a deep acc … More eptor are considered. Quasi-pulsed I-V curves have been derived from the transient characteristics. It has been shown that when the drain voltage is raised, the drain current overshoots the steady-state value, and when it is lowered, the drain current remains at a low value, showing drain-lag behavior. These are explained by the deep donor's electron capturing and electron emission processes. The drain lag has been shown to become a cause of current collapse, although some gate lag is also seen due to deep levels in the buffer layer. The current collapse has been shown to be more pronounced when the deep-acceptor density in the buffer layer is higher and when the off-state drain voltage is higher, because the trapping effects become more significant. These buffer-trapping effects may be similar to trapping effects in an undoped GaN layer in AlGaN/GaN HEMTs. It is concluded that to minimize the current collapse in GaN FETs, the (deep) acceptor density in the buffer layer should be made low. Less
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DOI:
10.1002/pssc.200461311
发表时间:
2005-05
期刊:
Physica Status Solidi (c)
影响因子:
--
作者:
[K. Horio;K. Yonemoto]
通讯作者:
K. Horio;K. Yonemoto
Deep-level effects on slow current transients and current collapse in GaN MESFETs
GaN MESFET 中慢电流瞬变和电流崩溃的深层次效应
DOI:
--
发表时间:
2005
期刊:
Proceedings of the 13th Semi-conducting and Insulating Materials Conference (IEEE SIMX-XIII)
影响因子:
--
作者:
[K.Yonemoto, K.Horio]
通讯作者:
K.Horio
Analysis of drain lag and power compression in GaN MESFET
GaN MESFET 漏极滞后和功率压缩分析
DOI:
--
发表时间:
2004
期刊:
Proceedings of the 12th European Gallium Arsenide & Other Semiconductor Application Symposium (GAAS 2004)
影响因子:
--
作者:
[K.Horio, K.Yonemoto]
通讯作者:
K.Yonemoto
Y.Kazami, D.Kasai, Y.Mitani, K.Horio: "Simulation of Lag Phenomena and Pulsed I-V Curves of Compound Semiconductor FETs as Affected by Impact Ionization"Journal of Computational Electronics. Vol.2. 203-206 (2003)
Y.Kazami、D.Kasai、Y.Mitani、K.Horio:“受碰撞电离影响的化合物半导体 FET 的滞后现象和脉冲 I-V 曲线的模拟”计算电子学杂志。
DOI:
--
发表时间:
期刊:
影响因子:
--
作者:
[]
通讯作者:
Simulation of power compression in GaAs and GaN MESFETs
GaAs 和 GaN MESFET 中的功率压缩仿真
DOI:
--
发表时间:
2004
期刊:
Proceedings of 2004 International Symposium of Signals, Systems and Electronics
影响因子:
--
作者:
[K.Horio, Y.Kazami, D.Kasai]
通讯作者:
D.Kasai
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