Correlation of geometrical and electronic properties in metallic nanowires

点击翻译按钮获取中文摘要

Crystalline metallic nanowires (Ag, Pb) with lateral dimensions below 10 nm down to atomic size, grown epitaxially on silicon substrates, will be studied with respect to correlations of electrical transport and the morpholgy of the wires and their interfaces. The experiments will be carried out using a combined high resolution SEM-STM system, which will be used to produce, characterize, and manipulate metallic nanowires and their surroundings down to the atomic scale. The conductance of the wires and its local variation will be measured by means of titanium silicide contact pads on the substrate and the STM tip as mobile voltage sensor so that the properties of single wires can be studied. By systematic variations of the substrate surface structure (step density, reconstruction via adsorbates) and the growth parameters (deposition rate, temperature, adsorbates) the influence of the wire interface structure and morphology on electrical transport properties will be elucidated. The wire geometry will be manipulated in order to create bottle necks by means of the STM tip and electromigration effects. The effects of single defects like grain boundaries, steps on the vacuum or substrate interface, and adsorbates on electron scattering will be accessed and quantified.