The Resonant Tunneling Electron Transport through a Quantum Dot and Its Application

研究了电子通过半导体量子点的共振输运机制，以及单电子晶体管(SET)的电流-电压特性。到目前为止，人们已经指出了集成电路中传统器件进一步小型化的许多问题，该器件作为未来有希望的继任者正受到越来越多的关注。随着器件尺寸的缩小，器件的孤岛部分从热平衡的经典系统转变为具有离散能级的量子力学系统，传统的器件运行理论失去了有效性。我们导出了一个描述只包含单个自旋简并量子能级的简单尺度集性质的模型哈密顿量，并讨论了输运机制。计算出电流图，以提供栅极偏置和漏极偏置的任意对的电流值。这样的信息对于将该器件应用于电路组成是有用的。结果表明，流经圆点的载流子流动力学对电流大小起着重要的控制作用。研究了用硅长方体量子点制作的超小尺寸器件的模型，并用蒙特卡罗方法模拟了器件的电流-电压特性。分析了点状电平结构，特别是电平简并度对电流-电压特性的影响。此外，还研究了温度以及与源漏相关的隧穿相对大小的影响。该项目使人们有可能了解超小尺寸器件在栅极偏置和漏极偏置变化的很大范围内的总体(尽管是近似的)器件行为。

The mechanism of the electron resonant transport through a semiconductor quantum dot, and the current-voltage characteristics of a single electron transistor (SET) was investigated. So far, lots of problems have been pointed out for farther down-sizing of the conventional device in integrated electronics, and the SET is attracting an increasing attention as a promising candidate for future successor. As the device size of a SET is scaled down, the island part of the device shifts from a classical system in thermal equilibrium to a quantum mechanical system with discrete energy levels, and the conventional theory of the device operation loses its validity. We have derived a model Hamiltonian describing the property of a simple scaled-down SET including only a single spin-degenerate quantum level, and discussed the transport mechanism. A current map is worked out so as to provide the current value for an arbitrary pair of the gate bias and the drain bias. Such an information is useful for application of the device to the circuit composition. It was shown that the carrier flow dynamics through the dot play an important role in controlling the current magnitude. A more realistic model of an ultra-small SET, fabricated with the silicon rectangular parallelepiped quantum dot is investigated and the current-voltage characteristics is simulated by the Monte Carlo method. The influence of the dot level structure, especially the level degeneracy, on the current-voltage characteristics is analyzed. Also the effect of temperature as well as that of the relative magnitude of tunneling related to the source and the drain is studied. This project has made it possible to understand the overall , though approximate, device behavior of the ultra-small SET for a wide range of the gate bias and the drain bias variation.