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A new low-complexity paradigm for analogue computation and hardware learning

A new low-complexity paradigm for analogue computation and hardware learning
用于模拟计算和硬件学习的新的低复杂度范式
批准号:
EP/V002759/1
负责人:
Radu Sporea
金额:
$142.79万
依托单位:
依托单位国家:
英国
项目类别:
Fellowship
财政年份:
2021
资助国家:
英国
项目状态:
未结题
起止时间:
2021 至 --

项目摘要

项目成果

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中文摘要
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英文摘要
The Fellow and his team are seeking to develop a ground-breaking electronic device named the multimodal transistor. Arising from more than a decade of experience in unconventional device design, it allows for entirely new applications such as hardware learning, analog computation and control, while being energy efficient and easy to fabricate.News headlines in electronic devices usually hail developments in nanoscale billion-transistor chips, yet there are major opportunities for innovation in display screen technologies, in which the requirement of fabricating circuits at low cost over large areas, and not ultimate miniaturization, is prevalent. Existing fabrication facilities are now partly being repurposed for emerging large area electronic (LAE) applications: microfluidics, lab-on-a chip, ubiquitous sensors or wearable electronics. LAE usually contain large arrays of relatively simple circuits with few transistors, as areal performance variations impede the fabrication of complex circuits. Incremental progress in LAE is constantly achieved through processes and equipment improvements, and by using new materials with superior properties, both with large capital investment. The Fellow proposes a major step in LAE development, a radical new device design: the multimodal transistor (MMT). The MMT enables new ways of designing electronic circuits for efficient analog operations (amplification, data conversion, analog computation), control and feedback, and ultimately, LAE circuits capable of learning (hardware AI), so far impractical with conventional devices and techniques. Functionality is achieved using energy-efficient circuits of minimal complexity, allowing environmentally friendly fabrication at low cost. By greatly expanding the design possibilities, while being entirely compatible with conventional LAE fabrication, MMT circuits extend the usable lifetime of current manufacturing technologies, maximising the return on investment, and can accelerate the uptake of emerging processes such as 2D semiconductors and spatial atomic layer deposition.The Fellow's team will leverage our long experience in device design and the complementary capabilities of our international partners to design, fabricate and test devices and circuits using vacuum processing and additive manufacturing in conventional and emergent semiconductor systems, supported by state-of-the-art numerical simulation. The team will use their extensive collaborator networks to seed the development of a new electronic design paradigm.As this is an enabling technology, its applications span fields from disposable medical diagnostics and crop monitoring to autonomous vehicle control, new forms user interfaces and immersive entertainment environments, with substantial long term economical and public benefits for the UK and the world. The implications of the novel functionality, such as hardware AI and autonomy, will be a constantly considered. Stakeholders will be involved in shaping the research through cross-disciplinary workshops, online engagement and science festival participation. The focus on people will further include: continuing a decade-long tradition of training, mentoring and involving school students in the Fellow's research; supporting a strong start to the careers of young researchers involved through mentoring, independence and due to the ground-breaking nature of the work; and incorporating the findings into Surrey's teaching curriculum to increase our graduates' employability. The Fellowship will accelerate the Fellow's growth as an international technical and thought leader, while retaining valuable skills, intellectual property and know-how in the UK at a time of global uncertainty. A Fellowship is the optimal funding route, allowing full commitment to advancing this trailblazing design paradigm, within a robust structure and collaborative environment which includes world-leading research facilities and support networks.
期刊论文(10)
专著(0)
科研奖励(0)
会议论文
Extraordinarily Weak Temperature Dependence of the Drain Current in Small-Molecule Schottky-Contact-Controlled Transistors through Active-Layer and Contact Interplay
通过有源层和接触相互作用,小分子肖特基接触控制晶体管中漏极电流的温度依赖性极弱
DOI: 10.1002/aelm.202201163
发表时间: 2022
期刊: Advanced Electronic Materials
影响因子: 6.2
作者: [Bestelink E]
通讯作者: Bestelink E
Evidence of Improved Thermal Stability via Nanoscale Contact Engineering in IGZO Source-Gated Thin-Film Transistors
通过 IGZO 源栅薄膜晶体管的纳米级接触工程提高热稳定性的证据
DOI: 10.1109/ted.2023.3276337
发表时间: 2023
期刊: IEEE Transactions on Electron Devices
影响因子: 3.1
作者: [Alfarisyi S]
通讯作者: Alfarisyi S
High gain complementary inverters based on comparably-sized IGZO and DNTT source-gated transistors
基于同等尺寸 IGZO 和 DNTT 源栅晶体管的高增益互补逆变器
DOI: 10.1039/d3tc02474a
发表时间: 2023
期刊: Journal of Materials Chemistry C
影响因子: 6.4
作者: [Bestelink E]
通讯作者: Bestelink E
DOI: 10.1109/ted.2023.3331668
发表时间: 2023-11-21
期刊: IEEE TRANSACTIONS ON ELECTRON DEVICES
影响因子: 3.1
作者: [Bestelink,Eva, Niang,Kham M., Sporea,Radu A.]
通讯作者: Sporea,Radu A.
7
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