Design for high-yield manufacturing of printed circuits
印刷电路高良率制造设计
基本信息
- 批准号:EP/R028559/1
- 负责人:
- 金额:$ 31.48万
- 依托单位:
- 依托单位国家:英国
- 项目类别:Research Grant
- 财政年份:2018
- 资助国家:英国
- 起止时间:2018 至 无数据
- 项目状态:已结题
- 来源:
- 关键词:
项目摘要
Emerging printed and flexible electronics have great potential for customised consumer, medical and communication applications. In the lab they show ever-increasing performance as designer materials with specific properties are being developed. For these technologies to bridge the gap to volume production, consistency of performance and high production yield are essential, yet current progress has largely focused on individual device performance. A type of electronic device, the source-gated transistor (SGT), was developed and patented at Surrey and operates on different principles to a conventional thin-film transistor. This device has the potential to produce uniform performance (especially drain current) despite significant parameter variation which may occur during manufacturing. SGTs can be made in a variety of technologies and in principle can be combined with conventional transistors to create high performance printed and large area electronic circuits without resorting to complicated compensation circuitry to repeatedly achieve the desired characteristics. SGTs would be ideal devices for routine operations in mass-market, low-cost printed electronics, in which their energy efficiency and uniformity of performance would outweigh the comparatively low operating speeds.This project would be the first systematic study of both devices and low cost circuits deliberately designed to take advantage of the uniformity benefits of SGTs, with a focus on organic materials. The field of organic transistor research is particularly attractive due to the comparative ease of fabrication, rich palette of designer materials materials - both current and future, flexible substrate compatibility and low capital investment in equipment. This research has, however, now reached a plateau with the development of high-performance semiconductors, where significant improvements are likely to arise chiefly through the synthesis of improved materials. The principal hurdles for high-volume manufacturability are now the comparatively low yield and significant variations in performance, particularly over a large area. We will demonstrate the next important innovation, bringing high-volume yield to the manufacturing of low-power organic electronic technologies, by addressing these challenges.Project partners NeuDrive (materials and devices), Silvaco (simulation), and Altro (smart living spaces) will provide essential know how in order to help achieve the project aims: to verify theoretical SGT properties by device fabrication and characterisation; to optimise the designs and assess the performance of electronic circuit blocks made with source-gated transistors; to support our findings with numerical modelling; to create design guidelines and documentation, facilitating the uptake of this new technology in both the academic and industrial environments.CPI, the national facility for research into advanced manufacturing processes for electronics, will be subcontracted for part of the fabrication, allowing research staff to concentrate on process development, device optimisation and circuit design.We expect the greatest value of the project to be in making possible the efficient high volume manufacturing of a wide variety of printed and flexible electronics used for wearables, sensor arrays and internet-of-things (IoT) devices, which are priorities for development in both the research community and industry. Our contribution will allow consistent performance to be obtained from printed and flexible circuits, directly increasing the market viability of a variety of cost-effective applications.
新兴的印刷和柔性电子产品在定制消费、医疗和通信应用方面具有巨大潜力。在实验室中,随着具有特定性能的设计师材料的开发,它们的性能不断提高。对于这些技术来说,为了弥补与批量生产的差距,性能的一致性和高产量是必不可少的,但目前的进展主要集中在单个设备的性能上。一种电子设备,源极选通晶体管(SGT),是在萨里开发并获得专利的,其工作原理与传统的薄膜晶体管不同。尽管在制造过程中可能会发生显著的参数变化,该器件仍有可能产生一致的性能(特别是漏电流)。SGT可以用各种技术制造,原则上可以与传统晶体管相结合,以创建高性能的印刷和大面积电子电路,而无需求助于复杂的补偿电路来重复实现所需的特性。SGT将是大众市场、低成本印刷电子产品常规操作的理想器件,其能效和性能的一致性将超过相对较低的运行速度。该项目将是首次对器件和低成本电路进行系统研究,这些器件和低成本电路旨在利用SGT的一致性优势,重点是有机材料。有机晶体管的研究领域特别吸引人,因为它相对容易制造,设计材料的调色板丰富-包括当前和未来的材料,灵活的衬底兼容性和对设备的低资本投资。然而,随着高性能半导体的发展,这项研究现在已经达到了一个平台期,这方面的重大改进可能主要通过合成改进的材料来实现。大批量生产的主要障碍是目前相对较低的产量和显著的性能差异,特别是在大范围内。我们将展示下一项重要的创新,通过解决这些挑战,为低功耗有机电子技术的制造带来高产量。项目合作伙伴NeuDrive(材料和器件)、SilVaco(模拟)和Altro(智能生活空间)将提供基本的技术诀窍,以帮助实现项目目标:通过器件制造和表征验证理论SGT特性;优化设计并评估由源极栅极晶体管制成的电子电路块的性能;用数值模拟支持我们的发现;创建设计指南和文档,促进这项新技术在学术和工业环境中的应用。CPI,国家电子先进制造工艺研究机构,将分包部分制造,使研究人员能够专注于工艺开发、设备优化和电路设计。我们预计该项目的最大价值将是使用于可穿戴设备、传感器阵列和物联网(IoT)设备的各种印刷和柔性电子产品的高效大批量制造成为可能,这些都是研究界和行业发展的优先事项。我们的贡献将使印刷和灵活的电路获得一致的性能,直接提高各种具有成本效益的应用的市场生存能力。
项目成果
期刊论文数量(10)
专著数量(0)
科研奖励数量(0)
会议论文数量(0)
专利数量(0)
31-1: Invited Paper: The Multimodal Thin-Film Transistor (MMT): A Versatile Low-Power and High-Gain Device with Inherent Linear Response
31-1:特邀论文:多模态薄膜晶体管(MMT):具有固有线性响应的多功能低功耗高增益器件
- DOI:10.1002/sdtp.13900
- 发表时间:2020
- 期刊:
- 影响因子:0
- 作者:Bestelink E
- 通讯作者:Bestelink E
Extraordinarily Weak Temperature Dependence of the Drain Current in Small-Molecule Schottky-Contact-Controlled Transistors through Active-Layer and Contact Interplay
通过有源层和接触相互作用,小分子肖特基接触控制晶体管中漏极电流的温度依赖性极弱
- DOI:10.1002/aelm.202201163
- 发表时间:2022
- 期刊:
- 影响因子:6.2
- 作者:Bestelink E
- 通讯作者:Bestelink E
The Secret Ingredient for Exceptional Contact-Controlled Transistors
- DOI:10.1002/aelm.202101101
- 发表时间:2021-12-15
- 期刊:
- 影响因子:6.2
- 作者:Bestelink, Eva;Zschieschang, Ute;Sporea, Radu A.
- 通讯作者:Sporea, Radu A.
Versatile Thin-Film Transistor with Independent Control of Charge Injection and Transport for Mixed Signal and Analog Computation
- DOI:10.1002/aisy.202000199
- 发表时间:2021-01-01
- 期刊:
- 影响因子:7.4
- 作者:Bestelink, Eva;de Sagazan, Olivier;Sporea, Radu A.
- 通讯作者:Sporea, Radu A.
Evidence of Improved Thermal Stability via Nanoscale Contact Engineering in IGZO Source-Gated Thin-Film Transistors
通过 IGZO 源栅薄膜晶体管的纳米级接触工程提高热稳定性的证据
- DOI:10.1109/ted.2023.3276337
- 发表时间:2023
- 期刊:
- 影响因子:3.1
- 作者:Alfarisyi S
- 通讯作者:Alfarisyi S
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Radu Sporea其他文献
Analytical Models for Delay and Power Analysis of Zero-VGS Load Unipolar Thin-Film Transistor Logic Circuits
零 VGS 负载单极薄膜晶体管逻辑电路的延迟和功耗分析模型
- DOI:
- 发表时间:
2014 - 期刊:
- 影响因子:3.1
- 作者:
Qingyu Cui;Radu Sporea;Wenjiang Liu;Xiaojun Guo - 通讯作者:
Xiaojun Guo
Source-Gated Transistors for Power- and Area-Efficient AMOLED Pixel Circuits
用于高效节能和面积高效的 AMOLED 像素电路的源门晶体管
- DOI:
10.1109/jdt.2013.2293181 - 发表时间:
2014-11 - 期刊:
- 影响因子:0
- 作者:
Xiaoli Xu;Radu Sporea;Xiaojun Guo - 通讯作者:
Xiaojun Guo
Radu Sporea的其他文献
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{{ truncateString('Radu Sporea', 18)}}的其他基金
Multipurpose Electronics Toolkit using Suspended Membranes: towards Systems on Nothing
使用悬浮膜的多用途电子工具包:走向无源系统
- 批准号:
EP/Y000196/1 - 财政年份:2024
- 资助金额:
$ 31.48万 - 项目类别:
Research Grant
A new low-complexity paradigm for analogue computation and hardware learning
用于模拟计算和硬件学习的新的低复杂度范式
- 批准号:
EP/V002759/1 - 财政年份:2021
- 资助金额:
$ 31.48万 - 项目类别:
Fellowship
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