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DEVELOPMENT OF VHF FLEXIBLE BEAMFORMER

DEVELOPMENT OF VHF FLEXIBLE BEAMFORMER
VHF 柔性波束形成器的开发
批准号:
6123420
负责人:
RICK TUTWILER
金额:
$16.81万
依托单位国家:
美国
项目类别:
财政年份:
1998
资助国家:
美国
项目状态:
已结题
起止时间:
1998-09-30 至 1999-08-31

项目摘要

项目成果

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中文摘要
翻译
实时 B 模式扫描的射频接收器和脉冲发生器部分 系统已设计、测试、调试并与 50 MHz 传感器。 接收部分的灵敏度为100 前端微伏和 TGC 的 60 dB 可变增益 放大器部分(两个串联级联)。 复用和 解复用电路已经设计和测试,并且 目前正在集成到一个完整的 2 通道系统中 测试。 一旦复用器和解复用器电路经过测试并 根据特征,射频前端电路将被复制 16 个 渠道。 数据采集系统能够同时 以 250 MHz 采样 8 个通道,以 125 MHz 采样 16 个通道。 50 MHz 阵列的实时数字波束形成架构 已被设计和模拟。 该系统基于过采样 Σ-Δ A/D 转换器技术,采样频率为 (波长/32)时间分辨率,可实现精确的转向时间延迟 和聚焦。 Σ-Δ A/D 转换器集成了一个 移位寄存器、多路复用器和控制逻辑来选择 适当的时间延迟样本。 MATLAB 软件库有 是为分辨率、覆盖范围、时间延迟(聚焦和 转向)和采样频率。 为了实现 (波长/32)分辨率,采样率约为 1 GHz 需要。 电路架构已经定义,系统是 目前正在采用高速 CMOS 组件进行设计 能够以数百 MHz 的工作频率运行。
英文摘要
The RF receiver and pulser sections of a real-time B-mode scanning system have been designed, tested, debugged, and integrated with a 50 MHz transducer. The receiver section has a sensitivity of 100 microvolts on the front end and 60 dB of variable gain from the TGC amplifier sections (two are cascaded in series). Multiplexing and demultiplexing circuits have been designed and tested and are currently being integrated into a complete 2 channel system for testing. Once the mux and demux circuits are tested and characterized, the RF front end circuitry will be duplicated for 16 channels. The data acquisition system is capable of simultaneously sampling 8 channels at 250 MHz and 16 channels at 125 MHz. A real time digital beam forming architecture for a 50 MHz array has been designed and simulated. The system is based on oversampling sigma-delta A/D converter technology which samples at a (wavelength/32) time resolution for accurate time delays for steering and focusing. The sigma-delta A/D converter is integrated with a shift register, multiplexer and control logic to select the appropriate samples for the time delay. A MATLAB software library has been written for resolution , coverage, time delay (focusing and steering), and sampling frequency. In order to achieve the (wavelength/32) resolution, sampling rates on the order of 1 GHz are required. A circuit architecture has been defined and the system is currently being designed with high speed CMOS components that are capable of running at operating frequencies of several hundred MHz.
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DEVELOPMENT OF VFIF FLEXIBLE BEAM FORMER
DEVELOPMENT OF VFIF FLEXIBLE BEAM FORMER
DEVELOPMENT OF VFIF FLEXIBLE BEAM FORMER
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