Simulation of quantum CMOS silicon devices

基于硅的CMOS（互补金属氧化物半导体）器件是微处理器工业背后的基本驱动力，其具有工业规模的小型化制造，它们是导致世纪的技术革命的廉价且可扩展的经典组件。低成本，可扩展的架构与经典的控制元件集成的前景提供了一个令人兴奋的资产，可以利用硅量子hardware.This博士将是一个基于硅的CMOS器件建模的重点研究，将用于检查能带结构，提取必要的参数，以完善实验数据和模型，重点是找到一个合适的方法来模拟这样的系统在低温温度。然后，创建的模型将用于与Quantum Motion和IMEC（校际微电子中心）合作制造进一步的设备。精炼的数据和建模设计将用于进一步实现容错架构的目标，其主要目标是开发具有容错保真度的双量子位门。

Silicon-based CMOS (complimentary metal-oxide-semiconductor) devices are the fundamental driver behind the microprocessor industry, with miniaturised fabrication on an industrial scale, they are a cheap and scalable classical component which led to the technological revolution of the 20$^{th}$ century. The prospect of low-cost, scalable architectures with integration with classical control elements offers an exciting asset that could be leveraged by silicon quantum hardware.This PhD will be a focused study on silicon-based CMOS device modelling which will be used to examine band structure, extract parameters necessary to refine experimental data and models, with an emphasis on finding a suitable way to model such systems at cryogenic temperatures. The models created would then be used to fabricate further devices in collaboration with Quantum Motion and IMEC (Interuniversity Micro-Electronics Center). Refined data and modelled designs will be used to further the goals of achieving fault-tolerant architectures with a primary goal of development of a two-qubit gate with fault tolerant fidelity.