Cosmic ray immunity of silicon carbide power electronic devices. Category Microelectronic device technology - Energy

碳化硅电力电子器件的宇宙射线抗扰度。

• 批准号: 2871797
• 金额: --
• 依托单位: University of Warwick
• 依托单位国家: 英国
• 项目类别: Studentship
• 财政年份: 2023
• 资助国家: 英国
• 起止时间: 2023 至 无数据
• 项目状态: 未结题
• 来源: https://gtr.ukri.org/projects?ref=studentship-2871797
• 关键词: Cosmic; ray; immunity; silicon; carbide

Over the last decade, silicon carbide (SiC) power electronic devices have been increasingly adopted in mainstream applications such as Electric Vehicles. Of upmost importance for their long term reliability is an immunity to damage from cosmic rays, which are high energy radiation from space (mainly neutrons) that can burn out power devices, even at sea level on Earth. To achieve the reliability metrics (failure-in-time rates) demanded by the automotive industry, SiC chip manufacturers producing SiC diodes and transistors (metal-oxide-semiconductor field effect transistors - MOSFETs) have to be derated. For example, MOSFETs with a breakdown voltage rating of 650V according to their datasheet, will in fact breakdown at 1000V. This ensures their cosmic ray reliability, but reduces their efficiency and increases their unit cost. Experiments carried out by several chip manufacturers have directly impacted international testing standards (particularly JEP151A) for SiC diodes and MOSFETs. Yet the knowledge of optimising devices for cosmic ray immunity has remained within commercial entities with little published in academic literature or conferences. In this project we will seek to understand the current landscape for cosmic ray immunity in today's SiC power devices, and develop methods to adapt power device design that would reduce the derating requirements. Working at the Chip IR line on STFC's ISIS Neutron and Muon Source in Harwell UK, the student shall first systematically test and analyse commercial SiC diodes and then MOSFETs. In first studying diodes, the Single Event burnout effects in the bulk of a drift region can be isolated, free of mechanisms that will damage the weak metal-oxide-semiconductor (MOS) gate. Diodes of varying voltage and current rating will be tested to compare the effects of drift region thickness and device area. Two distinct MOSFET architectures, known as trench and planar MOSFETs, have different challenges when it comes to protecting the crucial gate oxide, which can easily be damaged by localised heating and high electric fields as a device recovers from a neutron strike. The student will test commercial MOSFETs that include planar devices and different trench architectures to compare their characteristics. Alongside the testing, the student will develop a method to replicate the cosmic ray tests in TCAD simulations. The data obtained from testing at ISIS will be used to benchmark cosmic ray simulations applied to existing digital twin models of the different commercial devices. These models will then be used to develop new device architecture concepts that provide greater immunity, by better protecting the MOS interface. Completing the loop, the student, with support from other researchers, will produce these new devices in the University of Warwick clean room facilities, and tested in ISIS. Results from this investigation are expected to open up the field of Cosmic Ray testing in SiC power devices to a much wider audience, improving visibility of this important next stage in the materials maturity.

在过去的十年中，碳化硅（SiC）电力电子器件越来越多地应用于电动汽车等主流应用中。对于它们的长期可靠性来说，最重要的是对宇宙射线的损害具有免疫力，宇宙射线是来自太空的高能辐射（主要是中子），即使在地球的海平面上，也可以烧毁电力设备。为了达到汽车行业所要求的可靠性指标（及时故障率），生产SiC二极管和晶体管（金属氧化物半导体场效应晶体管-MOSFET）的SiC芯片制造商必须降低额定值。例如，根据MOSFET的击穿电压额定值为650 V的MOSFET实际上将在1000 V时击穿。这确保了它们的宇宙射线可靠性，但降低了它们的效率并增加了它们的单位成本。几家芯片制造商进行的实验直接影响了SiC二极管和MOSFET的国际测试标准（特别是JEP 151 A）。然而，优化宇宙射线免疫装置的知识仍然存在于商业实体中，很少在学术文献或会议上发表。在这个项目中，我们将试图了解目前的SiC功率器件的宇宙射线抗扰度的现状，并开发方法来调整功率器件设计，以降低降额要求。在位于英国Harwell的STFC ISIS中子和μ子源的芯片IR线上工作，学生将首先系统地测试和分析商用SiC二极管，然后是MOSFET。在研究二极管的第一步中，漂移区中的单粒子烧毁效应可以被隔离，而不会损坏弱金属氧化物半导体（MOS）栅极。不同电压和额定电流的二极管将被测试，以比较漂移区厚度和器件面积的影响。两种不同的MOSFET架构，即沟槽MOSFET和平面MOSFET，在保护关键的栅极氧化层方面面临不同的挑战，当器件从中子撞击中恢复时，这些氧化层很容易被局部加热和高电场损坏。学生将测试包括平面器件和不同沟槽架构的商用MOSFET，以比较它们的特性。除了测试，学生还将开发一种方法来复制TCAD模拟中的宇宙射线测试。从ISIS测试中获得的数据将用于对应用于不同商业设备的现有数字孪生模型的宇宙射线模拟进行基准测试。这些模型将用于开发新的器件架构概念，通过更好地保护MOS接口，提供更大的免疫力。完成循环后，这名学生将在其他研究人员的支持下，在沃里克大学的无尘室设施中生产这些新设备，并在ISIS中进行测试。这项调查的结果有望为更广泛的受众开辟SiC功率器件中宇宙射线测试的领域，提高材料成熟度这一重要阶段的可见性。