Cosmic ray immunity of silicon carbide power electronic devices. Category Microelectronic device technology - Energy

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Over the last decade, silicon carbide (SiC) power electronic devices have been increasingly adopted in mainstream applications such as Electric Vehicles. Of upmost importance for their long term reliability is an immunity to damage from cosmic rays, which are high energy radiation from space (mainly neutrons) that can burn out power devices, even at sea level on Earth. To achieve the reliability metrics (failure-in-time rates) demanded by the automotive industry, SiC chip manufacturers producing SiC diodes and transistors (metal-oxide-semiconductor field effect transistors - MOSFETs) have to be derated. For example, MOSFETs with a breakdown voltage rating of 650V according to their datasheet, will in fact breakdown at 1000V. This ensures their cosmic ray reliability, but reduces their efficiency and increases their unit cost. Experiments carried out by several chip manufacturers have directly impacted international testing standards (particularly JEP151A) for SiC diodes and MOSFETs. Yet the knowledge of optimising devices for cosmic ray immunity has remained within commercial entities with little published in academic literature or conferences. In this project we will seek to understand the current landscape for cosmic ray immunity in today's SiC power devices, and develop methods to adapt power device design that would reduce the derating requirements. Working at the Chip IR line on STFC's ISIS Neutron and Muon Source in Harwell UK, the student shall first systematically test and analyse commercial SiC diodes and then MOSFETs. In first studying diodes, the Single Event burnout effects in the bulk of a drift region can be isolated, free of mechanisms that will damage the weak metal-oxide-semiconductor (MOS) gate. Diodes of varying voltage and current rating will be tested to compare the effects of drift region thickness and device area. Two distinct MOSFET architectures, known as trench and planar MOSFETs, have different challenges when it comes to protecting the crucial gate oxide, which can easily be damaged by localised heating and high electric fields as a device recovers from a neutron strike. The student will test commercial MOSFETs that include planar devices and different trench architectures to compare their characteristics. Alongside the testing, the student will develop a method to replicate the cosmic ray tests in TCAD simulations. The data obtained from testing at ISIS will be used to benchmark cosmic ray simulations applied to existing digital twin models of the different commercial devices. These models will then be used to develop new device architecture concepts that provide greater immunity, by better protecting the MOS interface. Completing the loop, the student, with support from other researchers, will produce these new devices in the University of Warwick clean room facilities, and tested in ISIS. Results from this investigation are expected to open up the field of Cosmic Ray testing in SiC power devices to a much wider audience, improving visibility of this important next stage in the materials maturity.