Security aspects of partial reconfiguration in software defined radio

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As FPGAs become more powerful and more power efficient there acceptance grows in the world of software defined radio (SDR). In SDR efficient sharing of resources is critical to the implementation of multiple waveforms. Partial Reconfiguration (PR) enables such technology. PR has been shown to work on large scale problems and is now well supported by some FPGA manufacturers.PR opens not only the way to the dynamic sharing of resources but also permits the implementation of security sensitive algorithms. Secure applications have many requirements that can be addressed by PR technology such as boundary monitoring and enforcing. PR however also raises a number of important security aspects due to the possibility of dynamically altering key portions of various algorithms.This project will focus on two distinct but similar problems. It will introduce and validate mechanisms to monitor and police the boundary conditions of secure algorithms such as to prohibit unwanted communications in and out of the secure box. It will also introduce mechanisms to monitor the dynamic download of code into the FPGA. A security framework test bench will be build in order to investigate these mechanisms.