Architectures and circuits for high-performance highly integrated wireless/wireline communication systems

点击翻译按钮获取中文摘要

Analog, mixed-signal (designs that include both analog and digital subcircuits), and radio-frequency (RF) building blocks are often the performance bottleneck of communication systems and microsystems. These blocks usually dictate the speed and/or power consumption of the system. The goal of this research is to develop circuit design techniques and transceiver architectures that are suited to high-performance highly integrated wireless/wireline communication systems as well as microsystems. The emphasis of the research is on the systems implemented in deep submicron bulk CMOS technologies and operating in the frequency ranges up to a few tens of GHz. Bulk CMOS technologies have emerged as promising low-cost alternative (as opposed to compound semiconductor technologies such as GaAs) for high-performance integrated solutions. In, addition CMOS technologies provide the possibility of integrating analog and digital circuitry on the same chip and are suitable candidates for mixed-signal microsystems. However, advances in bulk CMOS technologies are mainly driven by the digital world and therefore digital performance metrics of CMOS technologies have grown significantly faster than corresponding measures in analog, mixed-signal, and RF circuits. Although both analog and digital components take advantage of the higher speed of operation due to technology scaling, unlike their digital counterparts, analog circuits are more constrained by noise and accuracy requirements. Hence, the performance of analog, mixed-signal, and RF circuits often only conditionally benefits from technology scaling and can even deteriorate with the trend in decreasing supply voltages. In general, the net benefit of CMOS implementation of systems due to technology scaling, that is, the overall performance improvement due to (re-)designing systems in a more advanced CMOS technology, is a strong function of the system architecture and circuit design techniques. Therefore, it is the goal of this research to develop new CMOS-friendly circuit design techniques for analog, mixed-signal, and RF building blocks in advanced CMOS technologies.