Practical approaches towards building nanoscale architechtures

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Nanostructures continue to be the focus of intense research because of their fascinating properties that can be distinctly different form their bulk counterparts, and thus show great promise for a range of applications. Complex metallic and organic architectures are emerging as important building blocks for on-chip interconnects and active components in nanoscale electronic, magnetic, photonic, and biosensing devices, for instance. One of the key ingredients required for these future applications is the ability to integrate numerous addressable nanostructures through assembly, patterning, and alignment on technologically relevant solid supports, such as semiconductor surfaces. The challenge lies in fabricating large areas of high density nanostructures, with feature sizes well below 100 nm, in an economically feasible manner. While photolithography will justifiably remain a core technology with respect to the upcoming sub-45 nm generations on the Semiconductor Industry Association (SIA) Roadmap, cost considerations for mass manufacturing will be one critical constraint. As a result, there is interest in the development of complementary patterning strategies that involve large scale self-assembly, for use as a soft organic template for nanostructure development. While block copolymer templating is suggested on the SIA Roadmap to be a potentially "innovative technology" for sub-45 nm feature patterning, there are still many challenges associated with their integration with silicon and other surfaces.