Synergistic Synthesis Methodologies and Computer-Aided Design Tools for Analog and RF Integrated Circuits in Advanced Technologies

先进技术中模拟和射频集成电路的协同综合方法和计算机辅助设计工具

• 批准号: 342185-2013
• 负责人: Zhang, Lihong
• 金额: $ 2.11万
• 依托单位: Memorial University of Newfoundland
• 依托单位国家: 加拿大
• 项目类别: Discovery Grants Program - Individual
• 财政年份: 2013
• 资助国家: 加拿大
• 起止时间: 2013-01-01 至 2014-12-31
• 项目状态: 已结题
• 来源: https://www.nserc-crsng.gc.ca/ase-oro/Details-Detailles_eng.asp?id=527596
• 关键词: Synergistic; Synthesis; Methodologies; Computer; Aided

Transistor performance in the 90nm and below technologies is strongly affected by extrinsic layout-dependent effects (LDEs), such as transistor well proximity and stress effects. Recent research has shown that ignoring LDEs at nanometer process nodes can cause 15%-30% variation in the transistor performance, which may readily lead to malfunction of analog/RF integrated circuits (IC). When using leading-edge commercially available analog/RF design methodologies, the associated LDE impact on circuit performance is unknown before the layout is generated. Thus, a large number of design iterations as well as manual intervention are inevitably required in advanced technologies.

在90nm及以下的技术中，晶体管性能受到外在布局依赖效应（LDEs）的强烈影响，例如晶体管井邻近和应力效应。最近的研究表明，在纳米工艺节点上忽略lde会导致晶体管性能变化15%-30%，这很容易导致模拟/射频集成电路（IC）的故障。当使用领先的商用模拟/射频设计方法时，相关的LDE对电路性能的影响在布局生成之前是未知的。因此，在先进的技术中，不可避免地需要大量的设计迭代和人工干预。