Power and performance optimization techniques for multi-core processors

多核处理器的功耗和性能优化技术

• 批准号: 372054-2009
• 负责人: Atoofian, Ehsan
• 金额: $ 2.19万
• 依托单位: Lakehead University
• 依托单位国家: 加拿大
• 项目类别: Discovery Grants Program - Individual
• 财政年份: 2013
• 资助国家: 加拿大
• 起止时间: 2013-01-01 至 2014-12-31
• 项目状态: 已结题
• 来源: https://www.nserc-crsng.gc.ca/ase-oro/Details-Detailles_eng.asp?id=528478
• 关键词: Power; performance; optimization; techniques; multi

Chip multiprocessors (CMPs) are becoming mainstream, making parallel programming necessary to utilize computational power provided by many cores. However, the grand challenge is to make parallelism pervasive and make it accessible for average programmers. The main difficulty of parallel programming comes from synchronization; concurrent accesses to a memory location should be coordinated to ensure that they do not interfere. This research proposal aims at improving power- and performance-efficiency of synchronization in chip multiprocessors.

芯片多处理器(CMP)正在成为主流，这使得并行编程成为利用多核提供的计算能力所必需的。然而，巨大的挑战是让并行性变得无处不在，并使普通程序员能够访问它。并行编程的主要困难来自同步；应该协调对内存位置的并发访问，以确保它们不会干扰。该研究方案旨在提高芯片多处理器同步的功耗和性能效率。