Ultra low noise wireless all digital phase locked loops

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The main focus is to lower the phase noise of high frequency wireless digital phase locked loops. The low phase noise will be realized by using a new architecture and improving the oscillator while maintaining low power consumption and providing digitally programmable output frequencies. One of the key challenges in doing this is developing circuits that can provide low noise at high frequency and the necessary characteristics for low power oscillator operation. Moving to finer geometry processes will help increase operating frequency but we will also investigate new circuit techniques and structures. This research project will be conducted at Carleton University and Kaben Wireless Silicon Inc. Successful completion of this project will result in a new generation of wireless products that will be designed in Canada and sold globally.