Ultra low noise wireless all digital phase locked loops

研究的重点是降低高频无线数字锁相环的相位噪声。低相位噪声将通过采用新的结构和改进振荡器来实现，同时保持低功耗和提供数字可编程输出频率。这样做的关键挑战之一是开发能够在高频下提供低噪声和低功率振荡器工作所需特性的电路。移动到更精细的几何过程将有助于提高操作频率，但我们也将研究新的电路技术和结构。这个研究项目将在卡尔顿大学和Kaben无线硅公司进行。该项目的成功完成将导致新一代无线产品将在加拿大设计并在全球销售。

The main focus is to lower the phase noise of high frequency wireless digital phase locked loops. The low phase noise will be realized by using a new architecture and improving the oscillator while maintaining low power consumption and providing digitally programmable output frequencies. One of the key challenges in doing this is developing circuits that can provide low noise at high frequency and the necessary characteristics for low power oscillator operation. Moving to finer geometry processes will help increase operating frequency but we will also investigate new circuit techniques and structures. This research project will be conducted at Carleton University and Kaben Wireless Silicon Inc. Successful completion of this project will result in a new generation of wireless products that will be designed in Canada and sold globally.