Transceiver Circuits for Optical Backplanes

光背板收发器电路

基本信息

  • 批准号:
    RGPIN-2014-04399
  • 负责人:
  • 金额:
    $ 1.82万
  • 依托单位:
  • 依托单位国家:
    加拿大
  • 项目类别:
    Discovery Grants Program - Individual
  • 财政年份:
    2015
  • 资助国家:
    加拿大
  • 起止时间:
    2015-01-01 至 2016-12-31
  • 项目状态:
    已结题

项目摘要

Optical links have long been known as lighter, cleaner, and faster alternatives to copper cables for long-haul data communication where the distance between communicating nodes is in kilometers. In the last decade, however, as the sheer weight and volume of the copper cables have increased substantially, optical links have replaced copper cables in communication over shorter distances, such as a few meters between computers in data centers. Today, optical links are competing against copper at distances as short as a few centimeters, such as those between a microprocessor and a memory on a printer circuit board (PCB), for speeds in excess of 25Gb/s. At these speeds, the copper traces attenuate the electrical signal so much that it is extremely hard to recover the correct data at the receiver end no matter how much electronics one includes at the two ends of the link. On the other hand, the attenuation of an optical channel is known to be negligible at these distances even at far higher data rates. What has prohibited so far the wider use of optical backplanes is mainly the cost of electrical to optical and optical to electrical interfaces and the surrounding electronics to compensate for various imperfections of these interfaces. This is in addition to the assembly cost of the chips on board as much more precise alignments are necessary. This proposal relates to the innovation of designs (devices and circuits) for optical/electrical interfaces, and the electronics surrounding these interfaces. In particular, we propose designs for optical devices such as the ring modulators, photo-detectors, and optical filters, and electronic circuits such as trans-impedance amplifiers (TIA), limiting amplifiers, equalizers, and clock and data recovery circuits. The long-term objective of this research is to demonstrate a fully integrated transceiver for optical backplanes. The short-term objectives are to design, fabricate, and test individual building blocks of the complete transceiver. As part of this research, we also develop a system-level model (in Matlab or Simulink) that includes all the building blocks, along with their main sources of non-idealities. This model will be used to identify the link performance as a function of key design parameters. Accordingly, we determine the sensitivity of the link performance to each design parameter in order to identify the performance limits of the architectures. Once we determine the final architecture, we will move towards implementing one block at a time in circuit level. We will test each block individually before moving on to higher levels of integration.
长期以来,光链路一直被认为是铜缆的更轻、更清洁、更快的替代品,用于长距离数据通信,其中通信节点之间的距离以公里为单位。然而,在过去的十年中,随着铜缆的绝对重量和体积大幅增加,光纤链路已经取代了铜缆在更短距离上的通信,例如数据中心计算机之间的几米。如今,光链路在短至几厘米的距离上与铜线竞争,例如打印机电路板(PCB)上的微处理器和存储器之间的距离,速度超过25 Gb/s。在这些速度下,铜迹线使电信号衰减得如此之大,以至于无论在链路的两端包括多少电子设备,都很难在接收器端恢复正确的数据。另一方面,已知光信道的衰减在这些距离处甚至在高得多的数据速率下是可忽略的。到目前为止,阻碍光学背板更广泛使用的主要是电到光和光到电接口以及周围电子设备的成本,以补偿这些接口的各种缺陷。这除了板上芯片的组装成本之外,因为需要更精确的对准。 该提案涉及光/电接口的设计(设备和电路)以及围绕这些接口的电子设备的创新。特别是,我们提出了设计的光学器件,如环形调制器,光电探测器和光学滤波器,和电子电路,如跨阻放大器(TIA),限幅放大器,均衡器,时钟和数据恢复电路。这项研究的长期目标是展示一个完全集成的光背板收发器。短期目标是设计、制造和测试完整收发器的各个构建模块。 作为这项研究的一部分,我们还开发了一个系统级模型(在Matlab或Simulink中),其中包括所有的构建块,沿着其主要来源的非理想性。该模型将被用来确定作为关键设计参数的函数的链路性能。因此,我们确定每个设计参数的链路性能的灵敏度,以确定的架构的性能限制。一旦我们确定了最终的架构,我们将朝着在电路级一次实现一个模块的方向发展。我们将在进入更高级别的集成之前单独测试每个块。

项目成果

期刊论文数量(0)
专著数量(0)
科研奖励数量(0)
会议论文数量(0)
专利数量(0)

数据更新时间:{{ journalArticles.updateTime }}

{{ item.title }}
{{ item.translation_title }}
  • DOI:
    {{ item.doi }}
  • 发表时间:
    {{ item.publish_year }}
  • 期刊:
  • 影响因子:
    {{ item.factor }}
  • 作者:
    {{ item.authors }}
  • 通讯作者:
    {{ item.author }}

数据更新时间:{{ journalArticles.updateTime }}

{{ item.title }}
  • 作者:
    {{ item.author }}

数据更新时间:{{ monograph.updateTime }}

{{ item.title }}
  • 作者:
    {{ item.author }}

数据更新时间:{{ sciAawards.updateTime }}

{{ item.title }}
  • 作者:
    {{ item.author }}

数据更新时间:{{ conferencePapers.updateTime }}

{{ item.title }}
  • 作者:
    {{ item.author }}

数据更新时间:{{ patent.updateTime }}

Sheikholeslami, Ali其他文献

Ring modulator small-signal response analysis based on pole-zero representation
  • DOI:
    10.1364/oe.24.007585
  • 发表时间:
    2016-04-04
  • 期刊:
  • 影响因子:
    3.8
  • 作者:
    Karimelahi, Samira;Sheikholeslami, Ali
  • 通讯作者:
    Sheikholeslami, Ali
Jump Markov chains and rejection-free Metropolis algorithms
  • DOI:
    10.1007/s00180-021-01095-2
  • 发表时间:
    2021-03-13
  • 期刊:
  • 影响因子:
    1.3
  • 作者:
    Rosenthal, Jeffrey S.;Dote, Aki;Sheikholeslami, Ali
  • 通讯作者:
    Sheikholeslami, Ali
A Survey on Circuit Modeling of Spin-Transfer-Torque Magnetic Tunnel Junctions
A Novel STT-MRAM Cell With Disturbance-Free Read Operation

Sheikholeslami, Ali的其他文献

{{ item.title }}
{{ item.translation_title }}
  • DOI:
    {{ item.doi }}
  • 发表时间:
    {{ item.publish_year }}
  • 期刊:
  • 影响因子:
    {{ item.factor }}
  • 作者:
    {{ item.authors }}
  • 通讯作者:
    {{ item.author }}

{{ truncateString('Sheikholeslami, Ali', 18)}}的其他基金

Circuits and Architecture Innovations for Beyond CMOS Scaling
超越 CMOS 缩放比例的电路和架构创新
  • 批准号:
    RGPIN-2020-06828
  • 财政年份:
    2022
  • 资助金额:
    $ 1.82万
  • 项目类别:
    Discovery Grants Program - Individual
Circuits for Beyond 100Gb/s Wireline Communications
用于超过 100Gb/s 有线通信的电路
  • 批准号:
    537348-2018
  • 财政年份:
    2021
  • 资助金额:
    $ 1.82万
  • 项目类别:
    Collaborative Research and Development Grants
Circuits and Architecture Innovations for Beyond CMOS Scaling
超越 CMOS 缩放比例的电路和架构创新
  • 批准号:
    RGPIN-2020-06828
  • 财政年份:
    2021
  • 资助金额:
    $ 1.82万
  • 项目类别:
    Discovery Grants Program - Individual
Circuits for Beyond 100Gb/s Wireline Communications
用于超过 100Gb/s 有线通信的电路
  • 批准号:
    537348-2018
  • 财政年份:
    2020
  • 资助金额:
    $ 1.82万
  • 项目类别:
    Collaborative Research and Development Grants
Circuits and Architecture Innovations for Beyond CMOS Scaling
超越 CMOS 缩放比例的电路和架构创新
  • 批准号:
    RGPIN-2020-06828
  • 财政年份:
    2020
  • 资助金额:
    $ 1.82万
  • 项目类别:
    Discovery Grants Program - Individual
Circuits for Beyond 100Gb/s Wireline Communications
用于超过 100Gb/s 有线通信的电路
  • 批准号:
    537348-2018
  • 财政年份:
    2019
  • 资助金额:
    $ 1.82万
  • 项目类别:
    Collaborative Research and Development Grants
Transceiver Circuits for Optical Backplanes
光背板收发器电路
  • 批准号:
    RGPIN-2014-04399
  • 财政年份:
    2018
  • 资助金额:
    $ 1.82万
  • 项目类别:
    Discovery Grants Program - Individual
Transceiver Circuits for Optical Backplanes
光背板收发器电路
  • 批准号:
    RGPIN-2014-04399
  • 财政年份:
    2017
  • 资助金额:
    $ 1.82万
  • 项目类别:
    Discovery Grants Program - Individual
Transceiver Circuits for Optical Backplanes
光背板收发器电路
  • 批准号:
    RGPIN-2014-04399
  • 财政年份:
    2016
  • 资助金额:
    $ 1.82万
  • 项目类别:
    Discovery Grants Program - Individual
Modulators for optical communication
光通信调制器
  • 批准号:
    490448-2015
  • 财政年份:
    2015
  • 资助金额:
    $ 1.82万
  • 项目类别:
    Engage Grants Program

相似海外基金

An optical-genetic toolbox for monitoring and controlling diverse neuromodulatory circuits governing complex behaviors in primates
用于监测和控制灵长类动物复杂行为的多种神经调节回路的光遗传工具箱
  • 批准号:
    10650669
  • 财政年份:
    2023
  • 资助金额:
    $ 1.82万
  • 项目类别:
An All Optical Platform for Modeling and Monitoring Early Neurodegeneration in Human Neural Circuits
用于建模和监测人类神经回路早期神经退行性变的全光学平台
  • 批准号:
    10538043
  • 财政年份:
    2022
  • 资助金额:
    $ 1.82万
  • 项目类别:
Functional development of the olfactory nerve-related neural circuits in the embryonic forebrain: optical analysis with voltage-sensitive dyes
胚胎前脑中嗅觉神经相关神经回路的功能发育:电压敏感染料的光学分析
  • 批准号:
    22K06436
  • 财政年份:
    2022
  • 资助金额:
    $ 1.82万
  • 项目类别:
    Grant-in-Aid for Scientific Research (C)
An All Optical Platform for Modeling and Monitoring Early Neurodegeneration in Human Neural Circuits
用于建模和监测人类神经回路早期神经退行性变的全光学平台
  • 批准号:
    10684701
  • 财政年份:
    2022
  • 资助金额:
    $ 1.82万
  • 项目类别:
CHIRALFORCE_Chiral separation of molecules enabled by enantioselective optical forces in integrated nanophotonic circuits
CHIRALFORCE_集成纳米光子电路中通过对映选择性光学力实现分子的手性分离
  • 批准号:
    10045438
  • 财政年份:
    2022
  • 资助金额:
    $ 1.82万
  • 项目类别:
    EU-Funded
All-optical electrophysiology: probing real-time dynamics of neural circuits
全光学电生理学:探测神经回路的实时动态
  • 批准号:
    BB/W010623/1
  • 财政年份:
    2022
  • 资助金额:
    $ 1.82万
  • 项目类别:
    Fellowship
Photonic-phononic integrated circuits for (quantum) microwave to optical signal transduction
用于(量子)微波到光信号转换的光子-声子集成电路
  • 批准号:
    2765135
  • 财政年份:
    2022
  • 资助金额:
    $ 1.82万
  • 项目类别:
    Studentship
Electronic-photonic integrated circuits for on-chip optical isolation
用于片上光隔离的电子光子集成电路
  • 批准号:
    539204-2019
  • 财政年份:
    2022
  • 资助金额:
    $ 1.82万
  • 项目类别:
    Collaborative Research and Development Grants
CAREER: Backside Protection Against Contactless Optical Attacks on Integrated Circuits in Advanced Technology Nodes
职业:针对先进技术节点中集成电路的非接触式光学攻击的背面保护
  • 批准号:
    2143591
  • 财政年份:
    2022
  • 资助金额:
    $ 1.82万
  • 项目类别:
    Continuing Grant
Electronic-photonic integrated circuits for on-chip optical isolation
用于片上光隔离的电子光子集成电路
  • 批准号:
    539204-2019
  • 财政年份:
    2021
  • 资助金额:
    $ 1.82万
  • 项目类别:
    Collaborative Research and Development Grants
{{ showInfoDetail.title }}

作者:{{ showInfoDetail.author }}

知道了