Systematic and Structural Methods for Post-Silicon Validation

用于硅后验证的系统性和结构性方法

• 批准号: RGPIN-2015-05312
• 负责人: Nicolici, Nicola
• 金额: $ 2.7万
• 依托单位: McMaster University
• 依托单位国家: 加拿大
• 项目类别: Discovery Grants Program - Individual
• 财政年份: 2015
• 资助国家: 加拿大
• 起止时间: 2015-01-01 至 2016-12-31
• 项目状态: 已结题
• 来源: https://www.nserc-crsng.gc.ca/ase-oro/Details-Detailles_eng.asp?id=590351
• 关键词: Systematic; Structural; Methods; Post; Silicon

The difficulty of guaranteeing that electronic circuits and systems meet the stated or implied goals has been continuously increasing over the past decade. This is mainly due to the exponential dependence of the state space on the growing number of state elements, as well as the excessively large number of clock and power domains needed to facilitate performance improvements under power and energy constraints. Pre-silicon verification is commonly employed to ensure the consistency between the design and its specification. Before tapeout what can be measured is limited by the simulation time and accuracy, and designs are released for manufacturing when the confidence level is deemed sufficient. Manufacturing test is focused on screening for physical defects in each fabricated device; considering that its reference is the design implementation, manufacturing test is not concerned with finding and identifying subtle design errors (or bugs) that have escaped to silicon prototypes. Thus the verification tasks employed during the pre-silicon phase continue on these early silicon prototypes, a term commonly referred to as post-silicon validation.

在过去的十年中，保证电子电路和系统满足明示或暗示的目标的难度不断增加。这主要是由于状态空间对不断增长的状态元素数量的指数依赖性，以及在功率和能量限制下促进性能改进所需的过多的时钟和功率域。通常采用硅前验证来确保设计与其规格之间的一致性。在流片之前，可测量的内容受到模拟时间和精度的限制，当置信水平足够时，设计才会发布用于制造。制造测试的重点是筛选每个制造设备中的物理缺陷；考虑到其参考是设计实现，制造测试并不关心发现和识别已逃逸到硅原型中的细微设计错误（或错误）。因此，在这些早期硅原型上继续进行硅前阶段采用的验证任务，该术语通常称为硅后验证。