Systematic and Structural Methods for Post-Silicon Validation

在过去的十年中，保证电子电路和系统满足所述或隐含的目标的难度一直在不断增加。这主要是由于状态空间对不断增长的状态元素数量的指数依赖性，以及在功率和能量约束下促进性能改进所需的过多数量的时钟和功率域。预硅验证通常用于确保设计与其规格之间的一致性。在流片之前，可以测量的内容受到模拟时间和精度的限制，当置信水平被认为足够时，设计被发布用于制造。制造测试的重点是筛选每个制造设备中的物理缺陷;考虑到其参考是设计实现，制造测试不关心发现和识别已经逃逸到硅原型的细微设计错误（或缺陷）。因此，在预硅阶段采用的验证任务继续在这些早期的硅原型上进行，通常称为后硅验证。

The difficulty of guaranteeing that electronic circuits and systems meet the stated or implied goals has been continuously increasing over the past decade. This is mainly due to the exponential dependence of the state space on the growing number of state elements, as well as the excessively large number of clock and power domains needed to facilitate performance improvements under power and energy constraints. Pre-silicon verification is commonly employed to ensure the consistency between the design and its specification. Before tapeout what can be measured is limited by the simulation time and accuracy, and designs are released for manufacturing when the confidence level is deemed sufficient. Manufacturing test is focused on screening for physical defects in each fabricated device; considering that its reference is the design implementation, manufacturing test is not concerned with finding and identifying subtle design errors (or bugs) that have escaped to silicon prototypes. Thus the verification tasks employed during the pre-silicon phase continue on these early silicon prototypes, a term commonly referred to as post-silicon validation.