Energy-efficient high-density wired communication links
节能高密度有线通信链路
基本信息
- 批准号:RGPIN-2015-04227
- 负责人:
- 金额:$ 1.6万
- 依托单位:
- 依托单位国家:加拿大
- 项目类别:Discovery Grants Program - Individual
- 财政年份:2017
- 资助国家:加拿大
- 起止时间:2017-01-01 至 2018-12-31
- 项目状态:已结题
- 来源:
- 关键词:
项目摘要
Scaling of integrated-circuit (IC) process technologies has enabled orders-of-magnitude increases in the processing capabilities of microprocessors and graphics processing units. Input/output (I/O) data rates per lane and aggregate data rates have also increased. Up until the early 2000s, research was focused on increasing performance, with little regard for power dissipation. Today, due to physical limitations on the peak power density of ICs, emphasis on high-performance mobile computing, the high cost of cooling large computing infrastructure (i.e, data centres), and the increased concern over energy use and carbon footprint, energy efficiency trumps performance as the primary specification. A key enabler of efficiency is the “energy proportional” computation paradigm in which power dissipation must scale down during intervals of reduced activity in processors and I/O links. Through approaches such as clock-gating and dynamic voltage and frequency scaling, processors are moving toward the goal of energy proportionality. However, I/O links are lagging in this regard despite recent focus on energy proportional I/O links from a few groups.
集成电路(IC)处理技术的扩展使得微处理器和图形处理单元的处理能力有了数量级的提高。每个通道的输入/输出(I/O)数据速率和聚合数据速率也有所提高。直到21世纪初,研究都集中在提高性能上,很少考虑功耗。今天,由于对集成电路峰值功率密度的物理限制,对高性能移动计算的强调,大型计算基础设施(即数据中心)的高冷却成本,以及对能源使用和碳足迹的日益关注,能效胜过性能成为主要规范。提高效率的一个关键因素是“能量比例”计算范式,在这种范式中,处理器和I/O链路的活动减少期间,功耗必须按比例降低。通过时钟门控和动态电压和频率缩放等方法,处理器正朝着能量比例化的目标迈进。然而,在这方面,I/O链接是滞后的,尽管最近集中在能量比例的I/O链接从少数组。
项目成果
期刊论文数量(0)
专著数量(0)
科研奖励数量(0)
会议论文数量(0)
专利数量(0)
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Cowan, Glenn其他文献
Responsivity optimization of a high-speed germanium-on-silicon photodetector
- DOI:
10.1364/oe.24.027738 - 发表时间:
2016-11-28 - 期刊:
- 影响因子:3.8
- 作者:
Fard, Monireh Moayedi Pour;Cowan, Glenn;Liboiron-Ladouceur, Odile - 通讯作者:
Liboiron-Ladouceur, Odile
Cowan, Glenn的其他文献
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{{ truncateString('Cowan, Glenn', 18)}}的其他基金
Energy-efficient high-density wired communication links
节能高密度有线通信链路
- 批准号:
RGPIN-2015-04227 - 财政年份:2021
- 资助金额:
$ 1.6万 - 项目类别:
Discovery Grants Program - Individual
Energy-efficient high-density wired communication links
节能高密度有线通信链路
- 批准号:
RGPIN-2015-04227 - 财政年份:2020
- 资助金额:
$ 1.6万 - 项目类别:
Discovery Grants Program - Individual
Energy-efficient high-density wired communication links
节能高密度有线通信链路
- 批准号:
RGPIN-2015-04227 - 财政年份:2019
- 资助金额:
$ 1.6万 - 项目类别:
Discovery Grants Program - Individual
Energy-efficient high-density wired communication links
节能高密度有线通信链路
- 批准号:
RGPIN-2015-04227 - 财政年份:2018
- 资助金额:
$ 1.6万 - 项目类别:
Discovery Grants Program - Individual
Energy-efficient high-density wired communication links
节能高密度有线通信链路
- 批准号:
RGPIN-2015-04227 - 财政年份:2016
- 资助金额:
$ 1.6万 - 项目类别:
Discovery Grants Program - Individual
Energy-efficient high-density wired communication links
节能高密度有线通信链路
- 批准号:
RGPIN-2015-04227 - 财政年份:2015
- 资助金额:
$ 1.6万 - 项目类别:
Discovery Grants Program - Individual
Mixed-signal VLSI for variability tolerant, low-power, and high-performance data communication
用于容变性、低功耗和高性能数据通信的混合信号 VLSI
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355602-2008 - 财政年份:2013
- 资助金额:
$ 1.6万 - 项目类别:
Discovery Grants Program - Individual
Mixed-signal VLSI for variability tolerant, low-power, and high-performance data communication
用于容变性、低功耗和高性能数据通信的混合信号 VLSI
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355602-2008 - 财政年份:2012
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$ 1.6万 - 项目类别:
Discovery Grants Program - Individual
Mixed-signal VLSI for variability tolerant, low-power, and high-performance data communication
用于容变性、低功耗和高性能数据通信的混合信号 VLSI
- 批准号:
355602-2008 - 财政年份:2011
- 资助金额:
$ 1.6万 - 项目类别:
Discovery Grants Program - Individual
Mixed-signal VLSI for variability tolerant, low-power, and high-performance data communication
用于容变性、低功耗和高性能数据通信的混合信号 VLSI
- 批准号:
355602-2008 - 财政年份:2010
- 资助金额:
$ 1.6万 - 项目类别:
Discovery Grants Program - Individual
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节能高密度有线通信链路
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