Lithographically induced self-assembly techniques for advanced electronic device fabrication

用于先进电子器件制造的光刻诱导自组装技术

• 批准号: 138052-2012
• 负责人: Beauvais, Jacques
• 金额: $ 1.82万
• 依托单位: Université de Sherbrooke
• 依托单位国家: 加拿大
• 项目类别: Discovery Grants Program - Individual
• 财政年份: 2017
• 资助国家: 加拿大
• 起止时间: 2017-01-01 至 2018-12-31
• 项目状态: 已结题
• 来源: https://www.nserc-crsng.gc.ca/ase-oro/Details-Detailles_eng.asp?id=637529
• 关键词: Lithographically; induced; self; assembly; techniques

The semiconductor industry has achieved a steady and tremendous growth in performance for more than 40 years, leading to the pervasiveness of electronics in our daily lives. But this industry is now facing three key challenges: 1) the tremendous amount of heat that is generated by electronic chips now sets serious limits to their continued miniaturization; 2) the choice of materials for pursuing the miniaturization trend leads to major issues with material properties, for example brittleness and heat dissipation issues; 3) the microprocessor architecture is now evolving towards the integration of several cores on a single silicon chip, thus requiring very challenging connections between segments of a microprocessor and between the microprocessors and other components of a computer. This led to the development of new materials and of innovative 3-dimensional and/or optoelectronic connections. Over the next 5 to 10 years, the industry needs innovative low power devices capable of extremely high speeds and these devices must be compatible with the current CMOS technology in order to capitalize on the massive manufacturing capacity currently available. Single electron transistors are very promising for addressing these issues, but they need highly advanced fabrication techniques for manufacturing; these techniques are now seriously challenged by physical limits at the scale of the nanometre. Self-assembled nanostructures such as carbon nanotubes that could be used in these and other nanoelectronic devices suffer from different problems, many related to the need to accurately position the nanotubes in an electronic circuit, and others related to the challenge of taking the fabrication processes out of the laboratory and into the manufacturing environment. This research program will explore hybrid approaches which leverage sophisticated nanolithography with simpler self-assembly techniques for producing nanostructures such as carbon nanotubes and metallic dots and accurately controlling their location in devices and circuits, in order to exploit their exceptional electrical, mechanical and thermal properties, and eventually to increase the performance of advanced electronic circuits.

半导体行业40多年来取得了稳定而巨大的业绩增长，导致电子产品在我们的日常生活中无处不在。但是该行业现在面临三个关键挑战：1）由电子芯片产生的大量热量现在严重限制了它们的持续小型化; 2）用于追求小型化趋势的材料的选择导致材料特性的主要问题，例如脆性和散热问题; 3）微处理器体系结构现在正朝着在单个硅芯片上集成几个核的方向发展，因此需要在微处理器的各部分之间以及在微处理器与计算机的其它组件之间进行非常具有挑战性的连接。这导致了新材料和创新的三维和/或光电连接的发展。在未来5到10年内，业界需要能够实现极高速度的创新型低功耗器件，这些器件必须与当前的CMOS技术兼容，以便利用当前的大规模制造能力。单电子晶体管非常有希望解决这些问题，但它们需要非常先进的制造技术;这些技术现在受到纳米级物理限制的严重挑战。可用于这些和其他纳米电子器件的自组装纳米结构（例如碳纳米管）遭受不同的问题，许多问题与需要在电子电路中精确定位纳米管有关，而其他问题与将制造过程从实验室带到制造环境中的挑战有关。该研究计划将探索混合方法，利用复杂的纳米光刻技术和更简单的自组装技术来生产纳米结构，如碳纳米管和金属点，并精确控制它们在设备和电路中的位置，以利用其特殊的电气，机械和热性能，并最终提高先进电子电路的性能。