Machine Learning Hardware Exploration via Parametric Analysis Software

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Advances in machine learning (ML) low-power, high-performance, mobile smartphone digital hardware have created unparalleled opportunities for improving the execution of trained ML models and thus expanding the application space of mobile computing. But these successes have also driven rapid expansion of data bandwidth and digital operational performance requirements thus increasing the costs to semiconductor hardware developers such as Qualcomm, the industrial partner involved in this application. Many factors limit the improved execution of trained ML models including low power budgets and cost restrictions placed on data bandwidth and digital performance demands of next generation smartphone, tablet, drone, IoT and other mobile devices. Yet, it is highly possible that across all of these diverse application spaces, ML algorithms - thoroughly informed of the computational nuances available in existing and emerging smartphone technologies - may yet be invented to adequately address this resourcing challenge and as a result greatly broaden the applicability of sophisticated inference problems to mobile settings. Getting insights into such a solution is of prime research interest for Qualcomm. In light of these resourcing issues there is an increasing need to understand the detailed mapping of ML algorithms onto the diverse mobile hardware available. An effective means of gaining such insights is possibly available via advanced parametric analysis software (PAS) designed to accurately assess the performance of various ML architectures on any hardware platform and provide metrics insightful enough to inform future micro-architectural design choices. However, there is a lack of PAS in the machine learning industry. This research project aims to build a framework for evaluation of a wide variety of ML micro-architectural hardware using rigorous software and hardware evaluation techniques.