本项目针对目前研制超高压SiC槽栅结构功率MOSFET过程中遇到的导通电阻较大、器件栅极可靠性差的问题，拟开展基于high-k介质增强技术的新型碳化硅高压MOSFET新结构设计和工艺实验研究，提出该新型MOS结构的优化设计方法，研究新型器件的性能提升机理，建立新结构的器件物理模型，并进行器件原型的研制，最终为研制该类碳化硅超高压相关器件提供理论基础。

The issues about higher on-resistance and poor reliability of the gate have definitely hindered the development of the high voltage SiC MOSFET. To overcome this problem, research on the novel high-k dielectric conductivity enhancement high-voltage SiC MOSFET will be performed in this proposal. The design method and the device structure optimum will be firstly studied in detail. And then, the physical mechanism and the model of the novel device will be present. The key process and device sample fabrication will be experimentally studied. These researches will be provide a theoretical basis for developing the SiC MOS related high voltage device.