Analog to Digital Conversion and Data Compression

本研究计划的目标是提供过采样A/ d的精确分析，特别是用于实现称为sigma-delta调制方法的各种架构。通过使用非线性和线性系统理论，随机过程和遍历理论的新旧技术，已经获得了各种输入信号（包括有和没有抖动）的单回路和多级（级联）sigma-delta调制体系结构的量化噪声行为的精确描述。本提案的主旨是将这些结果扩展到其他架构，包括具有泄漏积分器和非单位增益的sigma-delta环路，模sigma-delta和并行sigma-delta调制。此外，如果时间允许，其他相关主题将被研究，包括反馈量化的稳定性问题，以及将后续信号处理（如压缩和线性滤波）合并到A/D转换器中。

The goal of this research program is to provide exact analyses of over-sampled A/Ds, especially a variety of architectures for implementing a method known as sigma-delta modulation. Through the use of old and new techniques from nonlinear and linear systems theory, random processes, and ergodic theory, exact descriptions of the behavior of quantization noise for single-loop and multi- stage (cascaded) sigma-delta modulatory architectures for a variety of input signals (both with and without dithering) have been obtained. The thrust of the present proposal will be to extend these results to other architectures including a sigma-delta loop with leaky integrators and non-unity gain, modulo sigma-delta and parallel sigma-delta modulatory. Also, if time permits, other related topics will be examined including stability issues in feedback quantization, and the incorporation of subsequent signal processing (such as compression and linear filtering) into the A/D converter.