System Support for High Performance Computing

这项工作解决的基本问题是操作系统的结构，以利用多处理器，从而产生可能的最佳应用程序性能。在多处理器和单处理器上，内核和用户级别之间的分工是不同的。在单处理器上，内核负责地址空间、通信、资源分配、线程和线程调度。在共享内存多处理器上，内核i负责地址空间和资源分配，但通信、线程和线程调度是通过每个地址空间中的运行时支持在用户级别实现的。此外，每个地址空间直接控制虚拟内存管理和文件管理的某些关键方面。重要的是要了解，尽管像Mach 3.0这样的“微内核”设计采取了将文件系统、虚拟内存系统等从内核移到用户级服务器的重要步骤，但它们将跨地址空间通信、线程和线程调度留在了内核中。这些单片内核、微内核设计与这里倡导的“纳米内核”之间存在结构上的差异。在过去几年的实验工作中，研究人员在必须解决的大多数基本领域构建了概念验证原型：锁定协议、用户级线程、跨地址空间通信、内核接口、处理器分配策略和用户级虚拟内存管理。这项工作的目标有两种，直接的和间接的。直接目标包括：(1)将这些概念验证原型集成到一个单一系统中，令人信服地证明整体方法的可行性；以及(2)解决阻碍这种集成的问题，其中一些问题是已知的，有些问题只有通过承担任务才能发现。间接目标包括：(A)使用最终系统的“核心”来研究一些重要的策略问题(线程调度、处理器分配、虚拟内存管理)，这些问题只有在这样一个实验试验台上才能探索，以及(B)将该核心用作探索高性能系统对更高级架构的支持的基础，特别是具有分布式内存的大型机器、使用高带宽低延迟网络的分布式/并行编程以及宽地址机器。

The fundamental issue addressed in this work is the structuring of operating systems to take advantage of multiprocessors so as to yield the best possible application performance. The division of labor between the kernel and the user level is different on a multiprocessor than on a uniprocessor. On a uniprocessor, the kernel is responsible for address spaces, communication, resource allocation, threads, and thread scheduling. On a shared memory multiprocessor, the kernel iis left in charge of address spaces and resource allocation, but communication, threads, and thread scheduling are implemented at user level through runtime support in each address space. Furthermore, each address space is in direct control over certain key aspects of virtual memory management and file management. It is important to understand that while ``micro-kernel'' designs such as Mach 3.0 take the important step of moving the file system, the virtual memory system, etc., out of the kernel to user-level servers, they leave cross-address space communication, threads, and thread scheduling in the kernel. There are structural differences between these monolithic kernels, micro-kernel designs and the ``nano-kernel'' advocated here. In experimental work over the past several years, the researchers have constructed proof-of-concept prototypes in most of the essential areas that must be addressed: locking protocols, user-level threads, cross-address space communication, the kernel interface, processor allocation policies, and user-level virtual memory management. The objectives in this work are of two kinds, direct and indirect. Direct objectives include: (1) integrating these proof-of-concept prototypes into a single system, convincingly demonstrating the viability of the overall approach; and (2) solving the problems that stand in the way of this integration, some of which are known and some of which can only be discovered by undertaking the task. Indirect objectives include: (a) using the ``core'' of the resulting system to study a number of important policy questions (thread scheduling, processor allocation, virtual memory management) that can only be explored given such an experimental testbed, and (b) using this core as a base for exploring high performance system support for more advanced architectures, specifically large scale machines with distributed memory, distributed/parallel programming using high band-width low-latency networks, and wide-address machines.