New Paradigms for Instruction-Level Parallel Processors

本职业建议提出了开发和教授教学级并行性（ILP）的新范例。静态调度微体系结构通过将检测和调度ILP的责任下放给编译器来实现高性能。这种方法的缺点包括缺乏代之间的目标代码兼容性，对程序概要文件的依赖，以及对单个编译模型的侵蚀。本研究将为ILP开发新的范例，通过引入操作系统、链接器、汇编器、指令编码和微体系结构来消除这些缺点。教育计划将通过开设两门课程，将编译器的作用引入大二和大四的本科课程：“机器语言程序设计导论”将被修改，以包括对性能问题和编译器作用的认识；并开设高级课程，教授后端ILP编译器优化。这项建议的一个重要特点是在ILP的一个基本和技术上重要的领域培养研究生。研究和教育活动将使用TINKER指令集架构，该架构已由首席研究员和他的学生构建。

This CAREER proposal addresses new paradigms for exploiting and teaching instruction-level parallelism (ILP). Statically-scheduled microarchitectures achieve high performance by relegating to the compiler the responsibility for detecting and scheduling ILP. Drawbacks to this approach include a lack of object code compatibility between generations, the reliance on program profiles, and the erosion of the individual compilation model. This research will develop new paradigms for ILP that remove the draw-backs by enlisting the OS, the linker, the assembler, the instruction encoding and the microarchitecture. The educational plan will introduce the compiler's role in the undergraduate curriculum as the sophomore and senior levels by developing two courses: "Introduction to Machine Language Programming" will be modified to include an awareness of performance issues and the role of the compiler; and a senior level course will be developed to teach back-end ILP compiler optimization. An important feature of this proposal is the training of graduate students in a fundamentally and technologically significant area of ILP. The research and educational activities will use the TINKER Instruction Set Architecture that has been constructed by the principal investigator and his students.