CAREER: Making Asynchronous Design Practical

本研究针对异步（自定时）VLSI电路。高性能设计和自定时电路的测试正在研究中。研究重点是在以下领域开发工具和方法。首先，定义了一种新的自定时VLSI系统数据传输方案，即有界倾斜协议。其次，测试自定时电路的技术和工具，特别强调建模和测试异步电路中的实际延迟，正在开发中。第三，在自定时电路中，通过用并发交换功率和使用电压缩放技术来降低功耗的方法正在研究中。最后，通过在算术和信号处理应用中实现原型VLSI芯片，展示了异步VLSI设计的潜力。

This research is on asynchronous (self-timed) VLSI circuits. High performance design, and testing of self-timed circuits are being investigated. Research focuses on developing tools and methodologies in the following areas. First, a new data transmission scheme for self-timed VLSI systems, the bounded-skew protocol, is being defined. Second, techniques and tools to test self-timed circuits with special emphasis on modeling and testing the actual delays in asynchronous circuits are being developed. Third, methods to reduce power consumption in self-timed circuits by trading concurrency for power and using voltage scaling techniques are being examined. Finally, the potential of asynchronous VLSI design is being demonstrated through implementing prototype VLSI chips in arithmetic and signal processing applications.